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drivers: uart_pl011: Get clock frequency from DTS

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The uart_pl011 driver used system clock frequency
as a base for baudrate calculation. This commit corrects
that by obtaining the needed value from DTS.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
This commit is contained in:
Piotr Zięcik 2019-04-11 14:28:52 +02:00 • committed by Carles Cufí
commit 60314555ef
3 changed files with 12 additions and 4 deletions
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8
drivers/serial/uart_pl011.c
View file

@ -361,8 +361,8 @@ static int pl011_init(struct device *dev)
pl011_disable_fifo(dev); pl011_disable_fifo(dev);
/* Set baud rate */ /* Set baud rate */
ret = pl011_set_baudrate(dev, CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC, ret = pl011_set_baudrate(dev, DEV_CFG(dev)->sys_clk_freq,
DEV_DATA(dev)->baud_rate); DEV_DATA(dev)->baud_rate);
if (ret != 0) { if (ret != 0) {
return ret; return ret;
} }
@ -414,7 +414,7 @@ static void pl011_irq_config_func_0(struct device *dev);
static struct uart_device_config pl011_cfg_port_0 = { static struct uart_device_config pl011_cfg_port_0 = {
.base = (u8_t *)DT_PL011_PORT0_BASE_ADDRESS, .base = (u8_t *)DT_PL011_PORT0_BASE_ADDRESS,
.sys_clk_freq = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC, .sys_clk_freq = DT_PL011_PORT0_CLOCK_FREQUENCY,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN #ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = pl011_irq_config_func_0, .irq_config_func = pl011_irq_config_func_0,
#endif #endif
@ -468,7 +468,7 @@ static void pl011_irq_config_func_1(struct device *dev);
static struct uart_device_config pl011_cfg_port_1 = { static struct uart_device_config pl011_cfg_port_1 = {
.base = (u8_t *)DT_PL011_PORT1_BASE_ADDRESS, .base = (u8_t *)DT_PL011_PORT1_BASE_ADDRESS,
.sys_clk_freq = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC, .sys_clk_freq = DT_PL011_PORT1_CLOCK_FREQUENCY,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN #ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = pl011_irq_config_func_1, .irq_config_func = pl011_irq_config_func_1,
#endif #endif

4
soc/arm/arm/musca_a/dts_fixup.h
View file

@ -19,6 +19,7 @@
#define DT_PL011_PORT0_IRQ_RXTIM DT_ARM_PL011_40101000_IRQ_RXTIM #define DT_PL011_PORT0_IRQ_RXTIM DT_ARM_PL011_40101000_IRQ_RXTIM
#define DT_PL011_PORT0_IRQ_ERR DT_ARM_PL011_40101000_IRQ_ERR #define DT_PL011_PORT0_IRQ_ERR DT_ARM_PL011_40101000_IRQ_ERR
#define DT_PL011_PORT0_IRQ_PRI DT_ARM_PL011_40101000_IRQ_0_PRIORITY #define DT_PL011_PORT0_IRQ_PRI DT_ARM_PL011_40101000_IRQ_0_PRIORITY
#define DT_PL011_PORT0_CLOCK_FREQUENCY DT_ARM_PL011_40101000_CLOCKS_CLOCK_FREQUENCY
#define DT_PL011_PORT0_BAUD_RATE DT_ARM_PL011_40101000_CURRENT_SPEED #define DT_PL011_PORT0_BAUD_RATE DT_ARM_PL011_40101000_CURRENT_SPEED
#define DT_PL011_PORT0_NAME DT_ARM_PL011_40101000_LABEL #define DT_PL011_PORT0_NAME DT_ARM_PL011_40101000_LABEL
@ -28,6 +29,7 @@
#define DT_PL011_PORT1_IRQ_RXTIM DT_ARM_PL011_40102000_IRQ_RXTIM #define DT_PL011_PORT1_IRQ_RXTIM DT_ARM_PL011_40102000_IRQ_RXTIM
#define DT_PL011_PORT1_IRQ_ERR DT_ARM_PL011_40102000_IRQ_ERR #define DT_PL011_PORT1_IRQ_ERR DT_ARM_PL011_40102000_IRQ_ERR
#define DT_PL011_PORT1_IRQ_PRI DT_ARM_PL011_40102000_IRQ_0_PRIORITY #define DT_PL011_PORT1_IRQ_PRI DT_ARM_PL011_40102000_IRQ_0_PRIORITY
#define DT_PL011_PORT1_CLOCK_FREQUENCY DT_ARM_PL011_40102000_CLOCKS_CLOCK_FREQUENCY
#define DT_PL011_PORT1_BAUD_RATE DT_ARM_PL011_40102000_CURRENT_SPEED #define DT_PL011_PORT1_BAUD_RATE DT_ARM_PL011_40102000_CURRENT_SPEED
#define DT_PL011_PORT1_NAME DT_ARM_PL011_40102000_LABEL #define DT_PL011_PORT1_NAME DT_ARM_PL011_40102000_LABEL
@ -43,6 +45,7 @@
#define DT_PL011_PORT0_IRQ_RXTIM DT_ARM_PL011_50101000_IRQ_RXTIM #define DT_PL011_PORT0_IRQ_RXTIM DT_ARM_PL011_50101000_IRQ_RXTIM
#define DT_PL011_PORT0_IRQ_ERR DT_ARM_PL011_50101000_IRQ_ERR #define DT_PL011_PORT0_IRQ_ERR DT_ARM_PL011_50101000_IRQ_ERR
#define DT_PL011_PORT0_IRQ_PRI DT_ARM_PL011_50101000_IRQ_0_PRIORITY #define DT_PL011_PORT0_IRQ_PRI DT_ARM_PL011_50101000_IRQ_0_PRIORITY
#define DT_PL011_PORT0_CLOCK_FREQUENCY DT_ARM_PL011_50101000_CLOCKS_CLOCK_FREQUENCY
#define DT_PL011_PORT0_BAUD_RATE DT_ARM_PL011_50101000_CURRENT_SPEED #define DT_PL011_PORT0_BAUD_RATE DT_ARM_PL011_50101000_CURRENT_SPEED
#define DT_PL011_PORT0_NAME DT_ARM_PL011_50101000_LABEL #define DT_PL011_PORT0_NAME DT_ARM_PL011_50101000_LABEL
@ -52,6 +55,7 @@
#define DT_PL011_PORT1_IRQ_RXTIM DT_ARM_PL011_50102000_IRQ_RXTIM #define DT_PL011_PORT1_IRQ_RXTIM DT_ARM_PL011_50102000_IRQ_RXTIM
#define DT_PL011_PORT1_IRQ_ERR DT_ARM_PL011_50102000_IRQ_ERR #define DT_PL011_PORT1_IRQ_ERR DT_ARM_PL011_50102000_IRQ_ERR
#define DT_PL011_PORT1_IRQ_PRI DT_ARM_PL011_50102000_IRQ_0_PRIORITY #define DT_PL011_PORT1_IRQ_PRI DT_ARM_PL011_50102000_IRQ_0_PRIORITY
#define DT_PL011_PORT1_CLOCK_FREQUENCY DT_ARM_PL011_50102000_CLOCKS_CLOCK_FREQUENCY
#define DT_PL011_PORT1_BAUD_RATE DT_ARM_PL011_50102000_CURRENT_SPEED #define DT_PL011_PORT1_BAUD_RATE DT_ARM_PL011_50102000_CURRENT_SPEED
#define DT_PL011_PORT1_NAME DT_ARM_PL011_50102000_LABEL #define DT_PL011_PORT1_NAME DT_ARM_PL011_50102000_LABEL

4
soc/arm/arm/musca_b1/dts_fixup.h
View file

@ -19,6 +19,7 @@
#define DT_PL011_PORT0_IRQ_RXTIM DT_ARM_PL011_40105000_IRQ_RXTIM #define DT_PL011_PORT0_IRQ_RXTIM DT_ARM_PL011_40105000_IRQ_RXTIM
#define DT_PL011_PORT0_IRQ_ERR DT_ARM_PL011_40105000_IRQ_ERR #define DT_PL011_PORT0_IRQ_ERR DT_ARM_PL011_40105000_IRQ_ERR
#define DT_PL011_PORT0_IRQ_PRI DT_ARM_PL011_40105000_IRQ_0_PRIORITY #define DT_PL011_PORT0_IRQ_PRI DT_ARM_PL011_40105000_IRQ_0_PRIORITY
#define DT_PL011_PORT0_CLOCK_FREQUENCY DT_ARM_PL011_40105000_CLOCKS_CLOCK_FREQUENCY
#define DT_PL011_PORT0_BAUD_RATE DT_ARM_PL011_40105000_CURRENT_SPEED #define DT_PL011_PORT0_BAUD_RATE DT_ARM_PL011_40105000_CURRENT_SPEED
#define DT_PL011_PORT0_NAME DT_ARM_PL011_40105000_LABEL #define DT_PL011_PORT0_NAME DT_ARM_PL011_40105000_LABEL
@ -28,6 +29,7 @@
#define DT_PL011_PORT1_IRQ_RXTIM DT_ARM_PL011_40106000_IRQ_RXTIM #define DT_PL011_PORT1_IRQ_RXTIM DT_ARM_PL011_40106000_IRQ_RXTIM
#define DT_PL011_PORT1_IRQ_ERR DT_ARM_PL011_40106000_IRQ_ERR #define DT_PL011_PORT1_IRQ_ERR DT_ARM_PL011_40106000_IRQ_ERR
#define DT_PL011_PORT1_IRQ_PRI DT_ARM_PL011_40106000_IRQ_0_PRIORITY #define DT_PL011_PORT1_IRQ_PRI DT_ARM_PL011_40106000_IRQ_0_PRIORITY
#define DT_PL011_PORT1_CLOCK_FREQUENCY DT_ARM_PL011_40106000_CLOCKS_CLOCK_FREQUENCY
#define DT_PL011_PORT1_BAUD_RATE DT_ARM_PL011_40106000_CURRENT_SPEED #define DT_PL011_PORT1_BAUD_RATE DT_ARM_PL011_40106000_CURRENT_SPEED
#define DT_PL011_PORT1_NAME DT_ARM_PL011_40106000_LABEL #define DT_PL011_PORT1_NAME DT_ARM_PL011_40106000_LABEL
@ -43,6 +45,7 @@
#define DT_PL011_PORT0_IRQ_RXTIM DT_ARM_PL011_50105000_IRQ_RXTIM #define DT_PL011_PORT0_IRQ_RXTIM DT_ARM_PL011_50105000_IRQ_RXTIM
#define DT_PL011_PORT0_IRQ_ERR DT_ARM_PL011_50105000_IRQ_ERR #define DT_PL011_PORT0_IRQ_ERR DT_ARM_PL011_50105000_IRQ_ERR
#define DT_PL011_PORT0_IRQ_PRI DT_ARM_PL011_50105000_IRQ_0_PRIORITY #define DT_PL011_PORT0_IRQ_PRI DT_ARM_PL011_50105000_IRQ_0_PRIORITY
#define DT_PL011_PORT0_CLOCK_FREQUENCY DT_ARM_PL011_50105000_CLOCKS_CLOCK_FREQUENCY
#define DT_PL011_PORT0_BAUD_RATE DT_ARM_PL011_50105000_CURRENT_SPEED #define DT_PL011_PORT0_BAUD_RATE DT_ARM_PL011_50105000_CURRENT_SPEED
#define DT_PL011_PORT0_NAME DT_ARM_PL011_50105000_LABEL #define DT_PL011_PORT0_NAME DT_ARM_PL011_50105000_LABEL
@ -52,6 +55,7 @@
#define DT_PL011_PORT1_IRQ_RXTIM DT_ARM_PL011_50106000_IRQ_RXTIM #define DT_PL011_PORT1_IRQ_RXTIM DT_ARM_PL011_50106000_IRQ_RXTIM
#define DT_PL011_PORT1_IRQ_ERR DT_ARM_PL011_50106000_IRQ_ERR #define DT_PL011_PORT1_IRQ_ERR DT_ARM_PL011_50106000_IRQ_ERR
#define DT_PL011_PORT1_IRQ_PRI DT_ARM_PL011_50106000_IRQ_0_PRIORITY #define DT_PL011_PORT1_IRQ_PRI DT_ARM_PL011_50106000_IRQ_0_PRIORITY
#define DT_PL011_PORT1_CLOCK_FREQUENCY DT_ARM_PL011_50106000_CLOCKS_CLOCK_FREQUENCY
#define DT_PL011_PORT1_BAUD_RATE DT_ARM_PL011_50106000_CURRENT_SPEED #define DT_PL011_PORT1_BAUD_RATE DT_ARM_PL011_50106000_CURRENT_SPEED
#define DT_PL011_PORT1_NAME DT_ARM_PL011_50106000_LABEL #define DT_PL011_PORT1_NAME DT_ARM_PL011_50106000_LABEL