drivers: uart_pl011: Get clock frequency from DTS

The uart_pl011 driver used system clock frequency
as a base for baudrate calculation. This commit corrects
that by obtaining the needed value from DTS.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
This commit is contained in:
Piotr Zięcik 2019-04-11 14:28:52 +02:00 committed by Carles Cufí
commit 60314555ef
3 changed files with 12 additions and 4 deletions

View file

@ -361,8 +361,8 @@ static int pl011_init(struct device *dev)
pl011_disable_fifo(dev);
/* Set baud rate */
ret = pl011_set_baudrate(dev, CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC,
DEV_DATA(dev)->baud_rate);
ret = pl011_set_baudrate(dev, DEV_CFG(dev)->sys_clk_freq,
DEV_DATA(dev)->baud_rate);
if (ret != 0) {
return ret;
}
@ -414,7 +414,7 @@ static void pl011_irq_config_func_0(struct device *dev);
static struct uart_device_config pl011_cfg_port_0 = {
.base = (u8_t *)DT_PL011_PORT0_BASE_ADDRESS,
.sys_clk_freq = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC,
.sys_clk_freq = DT_PL011_PORT0_CLOCK_FREQUENCY,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = pl011_irq_config_func_0,
#endif
@ -468,7 +468,7 @@ static void pl011_irq_config_func_1(struct device *dev);
static struct uart_device_config pl011_cfg_port_1 = {
.base = (u8_t *)DT_PL011_PORT1_BASE_ADDRESS,
.sys_clk_freq = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC,
.sys_clk_freq = DT_PL011_PORT1_CLOCK_FREQUENCY,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = pl011_irq_config_func_1,
#endif