soc/intel_adsp: Require definitions for cavs_hda.h

Rather than defining them in the header, require a set of defines
be provided to cavs_hda.h as part of the expected input to the API.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
This commit is contained in:
Tom Burdick 2022-03-01 15:22:53 -06:00 committed by Anas Nashif
commit 602ef3fb0e
6 changed files with 39 additions and 17 deletions

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@ -4,14 +4,6 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include <drivers/dma.h>
#include <cavs_hda.h>
#include "dma_cavs_hda.h"
#define LOG_LEVEL CONFIG_DMA_LOG_LEVEL
#include <logging/log.h>
LOG_MODULE_REGISTER(dma_cavs_hda_dma);
/**
* @brief Intel CAVS HDA DMA (Stream) driver
*
@ -30,6 +22,19 @@ LOG_MODULE_REGISTER(dma_cavs_hda_dma);
* communicate to or from the Host or Link. Each stream set is uni directional.
*/
#include <drivers/dma.h>
#include "dma_cavs_hda.h"
#include <logging/log.h>
LOG_MODULE_REGISTER(dma_cavs_hda_dma, CONFIG_DMA_LOG_LEVEL);
/* Define low level driver required values */
#define HDA_HOST_IN_BASE DT_PROP_BY_IDX(DT_NODELABEL(hda_host_in), reg, 0)
#define HDA_HOST_OUT_BASE DT_PROP_BY_IDX(DT_NODELABEL(hda_host_out), reg, 0)
#define HDA_STREAM_COUNT DT_PROP(DT_NODELABEL(hda_host_out), dma_channels)
#define HDA_REGBLOCK_SIZE DT_PROP_BY_IDX(DT_NODELABEL(hda_host_out), reg, 1)
#include <cavs_hda.h>
int cavs_hda_dma_host_in_config(const struct device *dev,
uint32_t channel,

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@ -7,7 +7,6 @@
#define DT_DRV_COMPAT intel_cavs_hda_host_in
#include <drivers/dma.h>
#include <cavs_hda.h>
#include "dma_cavs_hda.h"
#define LOG_LEVEL CONFIG_DMA_LOG_LEVEL

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@ -7,7 +7,6 @@
#define DT_DRV_COMPAT intel_cavs_hda_host_out
#include <drivers/dma.h>
#include <cavs_hda.h>
#include "dma_cavs_hda.h"
#define LOG_LEVEL CONFIG_DMA_LOG_LEVEL

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@ -17,13 +17,22 @@
* Provides low level calls to support cAVS HDA streams with
* minimal abstraction that allows testing the hardware
* and its demands separately from the intended DMA API
* usage.
* usage. The only requirement is that you define the base
* addresses, the stream count, and the size of the ip blocks.
*/
#define HDA_HOST_OUT_BASE 0x72800
#define HDA_HOST_IN_BASE 0x72c00
#define HDA_STREAM_COUNT 7
#define HDA_REGBLOCK_SIZE 0x40
#ifndef HDA_HOST_OUT_BASE
#error Must define HDA_HOST_OUT_BASE
#endif
#ifndef HDA_HOST_IN_BASE
#error Must define HDA_HOST_IN_BASE
#endif
#ifndef HDA_STREAM_COUNT
#error Must define HDA_STREAM_COUNT
#endif
#ifndef HDA_REGBLOCK_SIZE
#error Must define HDA_REGBLOCK_SIZE
#endif
/* The read/write positions are masked to 24 bits */
#define HDA_RWP_MASK 0x00FFFFFF

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@ -6,7 +6,6 @@
#include <kernel.h>
#include <ztest.h>
#include <cavs_ipc.h>
#include <cavs_hda.h>
#include <drivers/dma.h>
#include "tests.h"
@ -17,6 +16,11 @@
static __aligned(128) uint8_t dma_buf[DMA_BUF_SIZE];
#define HDA_HOST_IN_BASE DT_PROP_BY_IDX(DT_NODELABEL(hda_host_in), reg, 0)
#define HDA_HOST_OUT_BASE DT_PROP_BY_IDX(DT_NODELABEL(hda_host_out), reg, 0)
#define HDA_STREAM_COUNT DT_PROP(DT_NODELABEL(hda_host_out), dma_channels)
#define HDA_REGBLOCK_SIZE DT_PROP_BY_IDX(DT_NODELABEL(hda_host_out), reg, 1)
#include <cavs_hda.h>
static volatile int msg_cnt;
static volatile int msg_res;

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@ -6,9 +6,15 @@
#include <kernel.h>
#include <ztest.h>
#include <cavs_ipc.h>
#include <cavs_hda.h>
#include <devicetree.h>
#include "tests.h"
#define HDA_HOST_IN_BASE DT_PROP_BY_IDX(DT_NODELABEL(hda_host_in), reg, 0)
#define HDA_HOST_OUT_BASE DT_PROP_BY_IDX(DT_NODELABEL(hda_host_out), reg, 0)
#define HDA_STREAM_COUNT DT_PROP(DT_NODELABEL(hda_host_out), dma_channels)
#define HDA_REGBLOCK_SIZE DT_PROP_BY_IDX(DT_NODELABEL(hda_host_out), reg, 1)
#include <cavs_hda.h>
#define IPC_TIMEOUT K_MSEC(500)
#define STREAM_ID 3U
#define HDA_BUF_SIZE 256