From 6020afe46a779783aa23b467ee43b9e13626f5da Mon Sep 17 00:00:00 2001 From: Felipe Neves Date: Tue, 7 Sep 2021 14:44:52 -0300 Subject: [PATCH] soc: riscv: esp32c3: update west version to enable wifi subsystem for esp32c3, also update the linker with proper wlog sections. Signed-off-by: Felipe Neves --- boards/riscv/esp32c3_devkitm/Kconfig.defconfig | 2 +- soc/riscv/esp32c3/linker.ld | 2 ++ west.yml | 2 +- 3 files changed, 4 insertions(+), 2 deletions(-) diff --git a/boards/riscv/esp32c3_devkitm/Kconfig.defconfig b/boards/riscv/esp32c3_devkitm/Kconfig.defconfig index 2dd649dbcd3..da2110aee53 100644 --- a/boards/riscv/esp32c3_devkitm/Kconfig.defconfig +++ b/boards/riscv/esp32c3_devkitm/Kconfig.defconfig @@ -19,4 +19,4 @@ choice BT_HCI_BUS_TYPE default BT_ESP32 endchoice -endif # BT \ No newline at end of file +endif # BT diff --git a/soc/riscv/esp32c3/linker.ld b/soc/riscv/esp32c3/linker.ld index 14d6fe7309d..2bea020a1dd 100644 --- a/soc/riscv/esp32c3/linker.ld +++ b/soc/riscv/esp32c3/linker.ld @@ -309,6 +309,8 @@ SECTIONS *(".srodata.*") *(.rodata) *(.rodata.*) + *(.rodata_wlog) + *(.rodata_wlog*) _thread_local_end = ABSOLUTE(.); _rodata_reserved_end = ABSOLUTE(.); . = ALIGN(4); diff --git a/west.yml b/west.yml index 9138deb9ead..2bf505f9ac7 100644 --- a/west.yml +++ b/west.yml @@ -62,7 +62,7 @@ manifest: groups: - hal - name: hal_espressif - revision: 6cb37487b6ee42f96b4ba0d4719bb5759b098822 + revision: 2f438dfde14900d35bf703ddc4c0f71efc0d065f path: modules/hal/espressif west-commands: west/west-commands.yml groups: