arch: arc: implement DIRECT IRQ support
* implement DIRECT IRQ support both for normal irq and fast irq. * add separate interrupt stack for fast irq and use CONFIG_ARC_ _FIRQ_STACK to control it. This will bring shortest interrupt latency for fast irq. * note that scheduing in DIRECT IRQ is not supported. Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
This commit is contained in:
Wayne Ren
Andrew Boie
parent
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commit
601b9afc9e
5 changed files with 215 additions and 0 deletions
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@ -95,6 +95,21 @@ config ARC_FIRQ
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If FIRQ is disabled, the handle of interrupts with highest priority
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will be same with other interrupts.
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config ARC_FIRQ_STACK
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bool "Enable separate firq stack"
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depends on ARC_FIRQ && RGF_NUM_BANKS > 1
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default n
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help
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Use separate stack for FIRQ handing. When the fast irq is also a direct
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irq, this will get the minimal interrupt latency.
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config ARC_FIRQ_STACK_SIZE
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int "FIRQ stack size"
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depends on ARC_FIRQ_STACK
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default 1024
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help
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The size of firq stack.
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config ARC_HAS_STACK_CHECKING
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bool "ARC has STACK_CHECKING"
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default y
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@ -26,6 +26,63 @@
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#include <irq.h>
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#include <sys/printk.h>
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/*
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* storage space for the interrupt stack of fast_irq
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*/
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#if defined(CONFIG_ARC_FIRQ_STACK)
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#if defined(CONFIG_SMP)
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K_THREAD_STACK_ARRAY_DEFINE(_firq_interrupt_stack, CONFIG_MP_NUM_CPUS,
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CONFIG_ARC_FIRQ_STACK_SIZE);
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#else
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K_THREAD_STACK_DEFINE(_firq_interrupt_stack, CONFIG_ARC_FIRQ_STACK_SIZE);
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#endif
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/*
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* @brief Set the stack pointer for firq handling
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*
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* @return N/A
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*/
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void z_arc_firq_stack_set(void)
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{
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#ifdef CONFIG_SMP
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char *firq_sp = Z_THREAD_STACK_BUFFER(
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_firq_interrupt_stack[z_arc_v2_core_id()]) +
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CONFIG_ARC_FIRQ_STACK_SIZE;
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#else
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char *firq_sp = Z_THREAD_STACK_BUFFER(_firq_interrupt_stack) +
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CONFIG_ARC_FIRQ_STACK_SIZE;
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#endif
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/* the z_arc_firq_stack_set must be called when irq diasbled, as
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* it can be called not only in the init phase but also other places
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*/
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unsigned int key = irq_lock();
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__asm__ volatile (
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/* only ilink will not be banked, so use ilink as channel
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* between 2 banks
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*/
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"mov ilink, %0 \n\t"
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"lr %0, [%1] \n\t"
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"or %0, %0, %2 \n\t"
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"kflag %0 \n\t"
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"mov sp, ilink \n\t"
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/* switch back to bank0, use ilink to avoid the pollution of
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* bank1's gp regs.
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*/
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"lr ilink, [%1] \n\t"
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"and ilink, ilink, %3 \n\t"
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"kflag ilink \n\t"
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:
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: "r"(firq_sp), "i"(_ARC_V2_STATUS32),
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"i"(_ARC_V2_STATUS32_RB(1)),
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"i"(~_ARC_V2_STATUS32_RB(7))
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);
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irq_unlock(key);
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}
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#endif
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/*
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* @brief Enable an interrupt line
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*
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@ -61,6 +118,17 @@ void z_arch_irq_disable(unsigned int irq)
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irq_unlock(key);
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}
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/**
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* @brief Return IRQ enable state
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*
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* @param irq IRQ line
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* @return interrupt enable state, true or false
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*/
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int z_arch_irq_is_enabled(unsigned int irq)
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{
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return z_arc_v2_irq_unit_int_enabled(irq);
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}
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/*
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* @internal
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*
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@ -143,6 +143,9 @@ _slave_core_wait:
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/* get sp set by master core */
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_get_curr_cpu_irq_stack sp
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#if defined(CONFIG_ARC_FIRQ_STACK)
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jl z_arc_firq_stack_set
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#endif
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j z_arch_slave_start
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_master_core_startup:
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@ -167,4 +170,8 @@ _master_core_startup:
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mov_s sp, INIT_STACK
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add sp, sp, INIT_STACK_SIZE
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#if defined(CONFIG_ARC_FIRQ_STACK)
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jl z_arc_firq_stack_set
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#endif
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j @_PrepC
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@ -86,6 +86,22 @@ void z_arc_v2_irq_unit_int_disable(int irq)
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z_arc_v2_irq_unit_irq_enable_set(irq, _ARC_V2_INT_DISABLE);
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}
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/*
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* @brief Poll the enable status of interrupt
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*
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* Polls the enable status of the specified interrupt
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*
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* @return 1 enabled, 0 disabled
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*/
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static ALWAYS_INLINE
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bool z_arc_v2_irq_unit_int_enabled(int irq)
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{
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z_arc_v2_aux_reg_write(_ARC_V2_IRQ_SELECT, irq);
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return z_arc_v2_aux_reg_read(_ARC_V2_IRQ_ENABLE) & 0x1;
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}
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/*
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* @brief Set interrupt priority
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*
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@ -28,10 +28,13 @@ extern "C" {
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GTEXT(_irq_exit);
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GTEXT(z_arch_irq_enable)
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GTEXT(z_arch_irq_disable)
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GTEXT(z_arc_firq_stack_set)
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#else
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extern void z_arc_firq_stack_set(void);
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extern void z_arch_irq_enable(unsigned int irq);
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extern void z_arch_irq_disable(unsigned int irq);
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extern int z_arch_irq_is_enabled(unsigned int irq);
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extern void _irq_exit(void);
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extern void z_irq_priority_set(unsigned int irq, unsigned int prio,
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@ -54,6 +57,112 @@ extern void z_irq_spurious(void *unused);
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irq_p; \
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})
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/**
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* Configure a 'direct' static interrupt.
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*
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* When firq has no separate stack(CONFIG_ARC_FIRQ_STACK=N), it's not safe
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* to call C ISR handlers because sp will be switched to bank1's sp which
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* is undefined value.
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* So for this case, the priority cannot be set to 0 but next level 1
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*
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* When firq has separate stack (CONFIG_ARC_FIRQ_STACK=y) but at the same
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* time stack checking is enabled (CONFIG_ARC_STACK_CHECKING=y)
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* the stack checking can raise stack check exception as sp is switched to
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* firq's stack (bank1's sp). So for this case, the priority cannot be set
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* to 0 but next level 1.
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*
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* Note that for the above cases, if application still wants to use firq by
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* setting priority to 0. Application can call z_irq_priority_set again.
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* Then it's left to application to handle the details of firq
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*
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* See include/irq.h for details.
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* All arguments must be computable at build time.
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*/
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#define Z_ARCH_IRQ_DIRECT_CONNECT(irq_p, priority_p, isr_p, flags_p) \
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({ \
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Z_ISR_DECLARE(irq_p, ISR_FLAG_DIRECT, isr_p, NULL); \
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BUILD_ASSERT_MSG(priority_p || !IS_ENABLED(CONFIG_ARC_FIRQ) || \
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(IS_ENABLED(CONFIG_ARC_FIRQ_STACK) && \
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!IS_ENABLED(CONFIG_ARC_STACK_CHECKING)), \
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"irq priority cannot be set to 0 when CONFIG_ARC_FIRQ_STACK" \
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"is not configured or CONFIG_ARC_FIRQ_STACK " \
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"and CONFIG_ARC_STACK_CHECKING are configured together"); \
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z_irq_priority_set(irq_p, priority_p, flags_p); \
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irq_p; \
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})
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static inline void z_arch_isr_direct_header(void)
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{
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#ifdef CONFIG_TRACING
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z_sys_trace_isr_enter();
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#endif
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}
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static inline void z_arch_isr_direct_footer(int maybe_swap)
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{
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/* clear SW generated interrupt */
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if (z_arc_v2_aux_reg_read(_ARC_V2_ICAUSE) ==
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z_arc_v2_aux_reg_read(_ARC_V2_AUX_IRQ_HINT)) {
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z_arc_v2_aux_reg_write(_ARC_V2_AUX_IRQ_HINT, 0);
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}
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#ifdef CONFIG_TRACING
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z_sys_trace_isr_exit();
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#endif
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}
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#define Z_ARCH_ISR_DIRECT_HEADER() z_arch_isr_direct_header()
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extern void z_arch_isr_direct_header(void);
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#define Z_ARCH_ISR_DIRECT_FOOTER(swap) z_arch_isr_direct_footer(swap)
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/*
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* Scheduling can not be done in direct isr. If required, please use kernel
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* aware interrupt handling
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*/
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#define Z_ARCH_ISR_DIRECT_DECLARE(name) \
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static inline int name##_body(void); \
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__attribute__ ((interrupt("ilink")))void name(void) \
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{ \
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ISR_DIRECT_HEADER(); \
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name##_body(); \
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ISR_DIRECT_FOOTER(0); \
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} \
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static inline int name##_body(void)
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/**
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*
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* @brief Disable all interrupts on the local CPU
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*
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* This routine disables interrupts. It can be called from either interrupt or
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* thread level. This routine returns an architecture-dependent
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* lock-out key representing the "interrupt disable state" prior to the call;
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* this key can be passed to irq_unlock() to re-enable interrupts.
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*
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* The lock-out key should only be used as the argument to the
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* irq_unlock() API. It should never be used to manually re-enable
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* interrupts or to inspect or manipulate the contents of the source register.
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*
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* This function can be called recursively: it will return a key to return the
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* state of interrupt locking to the previous level.
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*
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* WARNINGS
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* Invoking a kernel routine with interrupts locked may result in
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* interrupts being re-enabled for an unspecified period of time. If the
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* called routine blocks, interrupts will be re-enabled while another
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* thread executes, or while the system is idle.
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*
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* The "interrupt disable state" is an attribute of a thread. Thus, if a
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* thread disables interrupts and subsequently invokes a kernel
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* routine that causes the calling thread to block, the interrupt
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* disable state will be restored when the thread is later rescheduled
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* for execution.
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*
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* @return An architecture-dependent lock-out key representing the
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* "interrupt disable state" prior to the call.
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*/
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static ALWAYS_INLINE unsigned int z_arch_irq_lock(void)
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{
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unsigned int key;
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