soc: renesas: Add support for Renesas RZ/V2L
Add support for Renesas RZ/V2L Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com> Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
This commit is contained in:
parent
573a712bed
commit
5e967abcf3
7 changed files with 107 additions and 0 deletions
8
soc/renesas/rz/rzv2l/CMakeLists.txt
Normal file
8
soc/renesas/rz/rzv2l/CMakeLists.txt
Normal file
|
@ -0,0 +1,8 @@
|
|||
# Copyright (c) 2025 Renesas Electronics Corporation
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
zephyr_sources(soc.c)
|
||||
|
||||
zephyr_include_directories(.)
|
||||
|
||||
set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "")
|
10
soc/renesas/rz/rzv2l/Kconfig
Normal file
10
soc/renesas/rz/rzv2l/Kconfig
Normal file
|
@ -0,0 +1,10 @@
|
|||
# Copyright (c) 2025 Renesas Electronics Corporation
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
config SOC_SERIES_RZV2L
|
||||
select ARM
|
||||
select CPU_CORTEX_M33
|
||||
select CPU_HAS_ARM_MPU
|
||||
select HAS_RENESAS_RZ_FSP
|
||||
select CPU_CORTEX_M_HAS_DWT
|
||||
select SOC_EARLY_INIT_HOOK
|
27
soc/renesas/rz/rzv2l/Kconfig.defconfig
Normal file
27
soc/renesas/rz/rzv2l/Kconfig.defconfig
Normal file
|
@ -0,0 +1,27 @@
|
|||
# Copyright (c) 2025 Renesas Electronics Corporation
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
if SOC_SERIES_RZV2L
|
||||
|
||||
config NUM_IRQS
|
||||
default 480
|
||||
|
||||
config SYS_CLOCK_HW_CYCLES_PER_SEC
|
||||
default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency)
|
||||
|
||||
config FLASH_SIZE
|
||||
default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_FLASH),0,K)
|
||||
|
||||
config FLASH_BASE_ADDRESS
|
||||
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))
|
||||
|
||||
config SYS_CLOCK_EXISTS
|
||||
default y
|
||||
|
||||
config INIT_ARCH_HW_AT_BOOT
|
||||
default y
|
||||
|
||||
config BUILD_OUTPUT_S19
|
||||
default y
|
||||
|
||||
endif # SOC_SERIES_RZV2L
|
24
soc/renesas/rz/rzv2l/Kconfig.soc
Normal file
24
soc/renesas/rz/rzv2l/Kconfig.soc
Normal file
|
@ -0,0 +1,24 @@
|
|||
# Copyright (c) 2025 Renesas Electronics Corporation
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
config SOC_SERIES_RZV2L
|
||||
bool
|
||||
select SOC_FAMILY_RENESAS_RZ
|
||||
help
|
||||
Renesas RZ/V2L series
|
||||
|
||||
config SOC_SERIES
|
||||
default "rzv2l" if SOC_SERIES_RZV2L
|
||||
|
||||
config SOC_R9A07G054L23GBG
|
||||
bool
|
||||
select SOC_SERIES_RZV2L
|
||||
help
|
||||
R9A07G054L23GBG
|
||||
|
||||
config SOC_R9A07G054L23GBG_CM33
|
||||
bool
|
||||
select SOC_R9A07G054L23GBG
|
||||
|
||||
config SOC
|
||||
default "r9a07g054l23gbg" if SOC_R9A07G054L23GBG
|
21
soc/renesas/rz/rzv2l/soc.c
Normal file
21
soc/renesas/rz/rzv2l/soc.c
Normal file
|
@ -0,0 +1,21 @@
|
|||
/*
|
||||
* Copyright (c) 2025 Renesas Electronics Corporation
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file
|
||||
* @brief System/hardware module for Renesas RZ/V2L Group
|
||||
*/
|
||||
|
||||
#include <zephyr/init.h>
|
||||
#include <bsp_api.h>
|
||||
|
||||
/* System core clock is set to 200 MHz after reset */
|
||||
uint32_t SystemCoreClock = 200000000;
|
||||
|
||||
void soc_early_init_hook(void)
|
||||
{
|
||||
bsp_clock_init();
|
||||
}
|
12
soc/renesas/rz/rzv2l/soc.h
Normal file
12
soc/renesas/rz/rzv2l/soc.h
Normal file
|
@ -0,0 +1,12 @@
|
|||
/*
|
||||
* Copyright (c) 2025 Renesas Electronics Corporation
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef ZEPHYR_SOC_RENESAS_RZV2L_SOC_H_
|
||||
#define ZEPHYR_SOC_RENESAS_RZV2L_SOC_H_
|
||||
|
||||
#include <bsp_api.h>
|
||||
|
||||
#endif /* ZEPHYR_SOC_RENESAS_RZV2L_SOC_H_ */
|
|
@ -9,6 +9,11 @@ family:
|
|||
- name: r9a08g045s33gbg
|
||||
cpuclusters:
|
||||
- name: cm33
|
||||
- name: rzv2l
|
||||
socs:
|
||||
- name: r9a07g054l23gbg
|
||||
cpuclusters:
|
||||
- name: cm33
|
||||
- name: rzn2l
|
||||
socs:
|
||||
- name: r9a07g084m04gbg
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue