michaelh/zephyr
1
0
Fork 0
Code Releases Activity

serial: uart_rv32m1_lpuart: Fix build warnings

Browse source 
The driver was using non-'DT_' prefixed defines which are deprecated.
Move to using proper 'DT_' prefix defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2019-02-20 15:47:21 -06:00 • committed by Anas Nashif
commit 5e263f1c80
1 changed files with 36 additions and 36 deletions
Download patch file Download diff file Expand all files Collapse all files

72
drivers/serial/uart_rv32m1_lpuart.c
View file

@ -301,14 +301,14 @@ static void rv32m1_lpuart_config_func_0(struct device *dev);
#endif #endif
static const struct rv32m1_lpuart_config rv32m1_lpuart_0_config = { static const struct rv32m1_lpuart_config rv32m1_lpuart_0_config = {
.base = (LPUART_Type *)UART_0_BASE_ADDRESS, .base = (LPUART_Type *)DT_OPENISA_RV32M1_LPUART_UART_0_BASE_ADDRESS,
.clock_name = UART_0_CLOCK_CONTROLLER, .clock_name = DT_OPENISA_RV32M1_LPUART_UART_0_CLOCK_CONTROLLER,
.clock_subsys = (clock_control_subsys_t)UART_0_CLOCK_NAME, .clock_subsys = (clock_control_subsys_t)DT_OPENISA_RV32M1_LPUART_UART_0_CLOCK_NAME,
.clock_ip_name = kCLOCK_Lpuart0, .clock_ip_name = kCLOCK_Lpuart0,
.clock_ip_src = kCLOCK_IpSrcFircAsync, .clock_ip_src = kCLOCK_IpSrcFircAsync,
.baud_rate = UART_0_CURRENT_SPEED, .baud_rate = DT_OPENISA_RV32M1_LPUART_UART_0_CURRENT_SPEED,
#ifdef UART_0_HW_FLOW_CONTROL #ifdef DT_OPENISA_RV32M1_LPUART_UART_0_HW_FLOW_CONTROL
.hw_flow_control = UART_0_HW_FLOW_CONTROL, .hw_flow_control = DT_OPENISA_RV32M1_LPUART_UART_0_HW_FLOW_CONTROL,
#endif #endif
#ifdef CONFIG_UART_INTERRUPT_DRIVEN #ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = rv32m1_lpuart_config_func_0, .irq_config_func = rv32m1_lpuart_config_func_0,
@ -317,7 +317,7 @@ static const struct rv32m1_lpuart_config rv32m1_lpuart_0_config = {
static struct rv32m1_lpuart_data rv32m1_lpuart_0_data; static struct rv32m1_lpuart_data rv32m1_lpuart_0_data;
DEVICE_AND_API_INIT(uart_0, UART_0_LABEL, DEVICE_AND_API_INIT(uart_0, DT_OPENISA_RV32M1_LPUART_UART_0_LABEL,
&rv32m1_lpuart_init, &rv32m1_lpuart_init,
&rv32m1_lpuart_0_data, &rv32m1_lpuart_0_config, &rv32m1_lpuart_0_data, &rv32m1_lpuart_0_config,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
@ -326,10 +326,10 @@ DEVICE_AND_API_INIT(uart_0, UART_0_LABEL,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN #ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void rv32m1_lpuart_config_func_0(struct device *dev) static void rv32m1_lpuart_config_func_0(struct device *dev)
{ {
IRQ_CONNECT(UART_0_IRQ, UART_0_IRQ_PRI, rv32m1_lpuart_isr, IRQ_CONNECT(DT_OPENISA_RV32M1_LPUART_0_IRQ_0, DT_OPENISA_RV32M1_LPUART_0_IRQ_0_PRI, rv32m1_lpuart_isr,
DEVICE_GET(uart_0), 0); DEVICE_GET(uart_0), 0);
irq_enable(UART_0_IRQ); irq_enable(DT_OPENISA_RV32M1_LPUART_0_IRQ_0);
} }
#endif #endif
@ -342,14 +342,14 @@ static void rv32m1_lpuart_config_func_1(struct device *dev);
#endif #endif
static const struct rv32m1_lpuart_config rv32m1_lpuart_1_config = { static const struct rv32m1_lpuart_config rv32m1_lpuart_1_config = {
.base = (LPUART_Type *)UART_1_BASE_ADDRESS, .base = (LPUART_Type *)DT_OPENISA_RV32M1_LPUART_UART_1_BASE_ADDRESS,
.clock_name = UART_1_CLOCK_CONTROLLER, .clock_name = DT_OPENISA_RV32M1_LPUART_UART_1_CLOCK_CONTROLLER,
.clock_subsys = (clock_control_subsys_t)UART_1_CLOCK_NAME, .clock_subsys = (clock_control_subsys_t)DT_OPENISA_RV32M1_LPUART_UART_1_CLOCK_NAME,
.clock_ip_name = kCLOCK_Lpuart1, .clock_ip_name = kCLOCK_Lpuart1,
.clock_ip_src = kCLOCK_IpSrcFircAsync, .clock_ip_src = kCLOCK_IpSrcFircAsync,
.baud_rate = UART_1_CURRENT_SPEED, .baud_rate = DT_OPENISA_RV32M1_LPUART_UART_1_CURRENT_SPEED,
#ifdef UART_1_HW_FLOW_CONTROL #ifdef DT_OPENISA_RV32M1_LPUART_UART_1_HW_FLOW_CONTROL
.hw_flow_control = UART_1_HW_FLOW_CONTROL, .hw_flow_control = DT_OPENISA_RV32M1_LPUART_UART_1_HW_FLOW_CONTROL,
#endif #endif
#ifdef CONFIG_UART_INTERRUPT_DRIVEN #ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = rv32m1_lpuart_config_func_1, .irq_config_func = rv32m1_lpuart_config_func_1,
@ -358,7 +358,7 @@ static const struct rv32m1_lpuart_config rv32m1_lpuart_1_config = {
static struct rv32m1_lpuart_data rv32m1_lpuart_1_data; static struct rv32m1_lpuart_data rv32m1_lpuart_1_data;
DEVICE_AND_API_INIT(uart_1, UART_1_LABEL, DEVICE_AND_API_INIT(uart_1, DT_OPENISA_RV32M1_LPUART_UART_1_LABEL,
&rv32m1_lpuart_init, &rv32m1_lpuart_init,
&rv32m1_lpuart_1_data, &rv32m1_lpuart_1_config, &rv32m1_lpuart_1_data, &rv32m1_lpuart_1_config,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
@ -367,10 +367,10 @@ DEVICE_AND_API_INIT(uart_1, UART_1_LABEL,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN #ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void rv32m1_lpuart_config_func_1(struct device *dev) static void rv32m1_lpuart_config_func_1(struct device *dev)
{ {
IRQ_CONNECT(UART_1_IRQ, UART_1_IRQ_PRI, rv32m1_lpuart_isr, IRQ_CONNECT(DT_OPENISA_RV32M1_LPUART_1_IRQ_0, DT_OPENISA_RV32M1_LPUART_1_IRQ_0_PRI, rv32m1_lpuart_isr,
DEVICE_GET(uart_1), 0); DEVICE_GET(uart_1), 0);
irq_enable(UART_1_IRQ); irq_enable(DT_OPENISA_RV32M1_LPUART_1_IRQ_0);
} }
#endif #endif
@ -383,14 +383,14 @@ static void rv32m1_lpuart_config_func_2(struct device *dev);
#endif #endif
static const struct rv32m1_lpuart_config rv32m1_lpuart_2_config = { static const struct rv32m1_lpuart_config rv32m1_lpuart_2_config = {
.base = (LPUART_Type *)UART_2_BASE_ADDRESS, .base = (LPUART_Type *)DT_OPENISA_RV32M1_LPUART_UART_2_BASE_ADDRESS,
.clock_name = UART_2_CLOCK_CONTROLLER, .clock_name = DT_OPENISA_RV32M1_LPUART_UART_2_CLOCK_CONTROLLER,
.clock_subsys = (clock_control_subsys_t)UART_2_CLOCK_NAME, .clock_subsys = (clock_control_subsys_t)DT_OPENISA_RV32M1_LPUART_UART_2_CLOCK_NAME,
.clock_ip_name = kCLOCK_Lpuart2, .clock_ip_name = kCLOCK_Lpuart2,
.clock_ip_src = kCLOCK_IpSrcFircAsync, .clock_ip_src = kCLOCK_IpSrcFircAsync,
.baud_rate = UART_2_CURRENT_SPEED, .baud_rate = DT_OPENISA_RV32M1_LPUART_UART_2_CURRENT_SPEED,
#ifdef UART_2_HW_FLOW_CONTROL #ifdef DT_OPENISA_RV32M1_LPUART_UART_2_HW_FLOW_CONTROL
.hw_flow_control = UART_2_HW_FLOW_CONTROL, .hw_flow_control = DT_OPENISA_RV32M1_LPUART_UART_2_HW_FLOW_CONTROL,
#endif #endif
#ifdef CONFIG_UART_INTERRUPT_DRIVEN #ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = rv32m1_lpuart_config_func_2, .irq_config_func = rv32m1_lpuart_config_func_2,
@ -399,7 +399,7 @@ static const struct rv32m1_lpuart_config rv32m1_lpuart_2_config = {
static struct rv32m1_lpuart_data rv32m1_lpuart_2_data; static struct rv32m1_lpuart_data rv32m1_lpuart_2_data;
DEVICE_AND_API_INIT(uart_2, UART_2_LABEL, DEVICE_AND_API_INIT(uart_2, DT_OPENISA_RV32M1_LPUART_UART_2_LABEL,
&rv32m1_lpuart_init, &rv32m1_lpuart_init,
&rv32m1_lpuart_2_data, &rv32m1_lpuart_2_config, &rv32m1_lpuart_2_data, &rv32m1_lpuart_2_config,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
@ -408,10 +408,10 @@ DEVICE_AND_API_INIT(uart_2, UART_2_LABEL,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN #ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void rv32m1_lpuart_config_func_2(struct device *dev) static void rv32m1_lpuart_config_func_2(struct device *dev)
{ {
IRQ_CONNECT(UART_2_IRQ, UART_2_IRQ_PRI, rv32m1_lpuart_isr, IRQ_CONNECT(DT_OPENISA_RV32M1_LPUART_2_IRQ_0, DT_OPENISA_RV32M1_LPUART_2_IRQ_0_PRI, rv32m1_lpuart_isr,
DEVICE_GET(uart_2), 0); DEVICE_GET(uart_2), 0);
irq_enable(UART_2_IRQ); irq_enable(DT_OPENISA_RV32M1_LPUART_2_IRQ_0);
} }
#endif #endif
@ -424,14 +424,14 @@ static void rv32m1_lpuart_config_func_3(struct device *dev);
#endif #endif
static const struct rv32m1_lpuart_config rv32m1_lpuart_3_config = { static const struct rv32m1_lpuart_config rv32m1_lpuart_3_config = {
.base = (LPUART_Type *)UART_3_BASE_ADDRESS, .base = (LPUART_Type *)DT_OPENISA_RV32M1_LPUART_UART_3_BASE_ADDRESS,
.clock_name = UART_3_CLOCK_CONTROLLER, .clock_name = DT_OPENISA_RV32M1_LPUART_UART_3_CLOCK_CONTROLLER,
.clock_subsys = (clock_control_subsys_t)UART_3_CLOCK_NAME, .clock_subsys = (clock_control_subsys_t)DT_OPENISA_RV32M1_LPUART_UART_3_CLOCK_NAME,
.clock_ip_name = kCLOCK_Lpuart3, .clock_ip_name = kCLOCK_Lpuart3,
.clock_ip_src = kCLOCK_IpSrcFircAsync, .clock_ip_src = kCLOCK_IpSrcFircAsync,
.baud_rate = UART_3_CURRENT_SPEED, .baud_rate = DT_OPENISA_RV32M1_LPUART_UART_3_CURRENT_SPEED,
#ifdef UART_3_HW_FLOW_CONTROL #ifdef DT_OPENISA_RV32M1_LPUART_UART_3_HW_FLOW_CONTROL
.hw_flow_control = UART_3_HW_FLOW_CONTROL, .hw_flow_control = DT_OPENISA_RV32M1_LPUART_UART_3_HW_FLOW_CONTROL,
#endif #endif
#ifdef CONFIG_UART_INTERRUPT_DRIVEN #ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = rv32m1_lpuart_config_func_3, .irq_config_func = rv32m1_lpuart_config_func_3,
@ -440,7 +440,7 @@ static const struct rv32m1_lpuart_config rv32m1_lpuart_3_config = {
static struct rv32m1_lpuart_data rv32m1_lpuart_3_data; static struct rv32m1_lpuart_data rv32m1_lpuart_3_data;
DEVICE_AND_API_INIT(uart_3, UART_3_LABEL, DEVICE_AND_API_INIT(uart_3, DT_OPENISA_RV32M1_LPUART_3_LABEL,
&rv32m1_lpuart_init, &rv32m1_lpuart_init,
&rv32m1_lpuart_3_data, &rv32m1_lpuart_3_config, &rv32m1_lpuart_3_data, &rv32m1_lpuart_3_config,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
@ -449,10 +449,10 @@ DEVICE_AND_API_INIT(uart_3, UART_3_LABEL,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN #ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void rv32m1_lpuart_config_func_3(struct device *dev) static void rv32m1_lpuart_config_func_3(struct device *dev)
{ {
IRQ_CONNECT(UART_3_IRQ, UART_3_IRQ_PRI, rv32m1_lpuart_isr, IRQ_CONNECT(DT_OPENISA_RV32M1_LPUART_3_IRQ_0, DT_OPENISA_RV32M1_LPUART_3_IRQ_0_PRI, rv32m1_lpuart_isr,
DEVICE_GET(uart_3), 0); DEVICE_GET(uart_3), 0);
irq_enable(UART_3_IRQ); irq_enable(DT_OPENISA_RV32M1_LPUART_3_IRQ_0);
} }
#endif #endif