ITE: drivers/i2c/target: Cleanup the clear status flow of I2C target

IT8XXX2_I2C_STR is a register of read-only, non-writable to clear.
Here we can set hardware reset bit in the IT8XXX2_I2C_CTR register
to clear the status of IT8XXX2_I2C_STR.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This commit is contained in:
Tim Lin 2023-08-04 17:28:31 +08:00 committed by Carles Cufí
commit 5de9203af3

View file

@ -966,10 +966,11 @@ static void target_i2c_isr(const struct device *dev)
/* Any error */
if (target_status & E_TARGET_ANY_ERROR) {
/* Hardware reset */
IT8XXX2_I2C_CTR(base) |= IT8XXX2_I2C_HALT;
goto end;
}
/* Interrupt pending */
} else if (target_status & IT8XXX2_I2C_INT_PEND) {
if (target_status & IT8XXX2_I2C_INT_PEND) {
uint8_t interrupt_status = IT8XXX2_I2C_IRQ_ST(base);
/* Byte counter enable */
@ -1021,14 +1022,13 @@ static void target_i2c_isr(const struct device *dev)
if (interrupt_status & IT8XXX2_I2C_P_CLR) {
/* Transfer done callback function */
target_cb->stop(data->target_cfg);
/* Hardware reset */
IT8XXX2_I2C_CTR(base) |= IT8XXX2_I2C_HALT;
}
/* Write clear the peripheral status */
IT8XXX2_I2C_IRQ_ST(base) = interrupt_status;
}
/* Write clear the target status */
IT8XXX2_I2C_STR(base) = target_status;
end:
/* Hardware reset */
IT8XXX2_I2C_CTR(base) |= IT8XXX2_I2C_HALT;
}
#endif