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pinctrl: require ; after PINCTRL_DT_(INST_)DEFINE macros

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The PINCTRL_DT_(INST_)DEFINE macros already defined the trailing ;,
making its usage inconsistent with other macros such as
DEVICE_DT_DEFINE.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit is contained in:
Gerard Marull-Paretas 2021-12-23 12:33:03 +01:00 • committed by Christopher Friedt
commit 5dc6ed3ce3
21 changed files with 24 additions and 24 deletions
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4
doc/guides/pinctrl/index.rst
View file

@ -473,7 +473,7 @@ The example below contains a complete example of a device driver that uses the
#define MYDEV_DEFINE(i) \ #define MYDEV_DEFINE(i) \
/* Define all pinctrl configuration for instance "i" */ \ /* Define all pinctrl configuration for instance "i" */ \
PINCTRL_DT_INST_DEFINE(i) \ PINCTRL_DT_INST_DEFINE(i); \
... \ ... \
static const struct mydev_config mydev_config_##i = { \ static const struct mydev_config mydev_config_##i = { \
... \ ... \
@ -484,7 +484,7 @@ The example below contains a complete example of a device driver that uses the
... \ ... \
\ \
DEVICE_DT_INST_DEFINE(i, mydev_init, NULL, &mydev_data##i, \ DEVICE_DT_INST_DEFINE(i, mydev_init, NULL, &mydev_data##i, \
&mydev_config##i, ...) &mydev_config##i, ...);
DT_INST_FOREACH_STATUS_OKAY(MYDEV_DEFINE) DT_INST_FOREACH_STATUS_OKAY(MYDEV_DEFINE)

2
drivers/adc/adc_stm32.c
View file

@ -1050,7 +1050,7 @@ static const struct adc_driver_api api_stm32_driver_api = {
\ \
static void adc_stm32_cfg_func_##index(void); \ static void adc_stm32_cfg_func_##index(void); \
\ \
PINCTRL_DT_INST_DEFINE(index) \ PINCTRL_DT_INST_DEFINE(index); \
\ \
static const struct adc_stm32_cfg adc_stm32_cfg_##index = { \ static const struct adc_stm32_cfg adc_stm32_cfg_##index = { \
.base = (ADC_TypeDef *)DT_INST_REG_ADDR(index), \ .base = (ADC_TypeDef *)DT_INST_REG_ADDR(index), \

4
drivers/can/can_stm32.c
View file

@ -1131,7 +1131,7 @@ static const struct can_driver_api can_api_funcs = {
static void config_can_1_irq(CAN_TypeDef *can); static void config_can_1_irq(CAN_TypeDef *can);
PINCTRL_DT_DEFINE(DT_NODELABEL(can1)) PINCTRL_DT_DEFINE(DT_NODELABEL(can1));
static const struct can_stm32_config can_stm32_cfg_1 = { static const struct can_stm32_config can_stm32_cfg_1 = {
.can = (CAN_TypeDef *)DT_REG_ADDR(DT_NODELABEL(can1)), .can = (CAN_TypeDef *)DT_REG_ADDR(DT_NODELABEL(can1)),
@ -1227,7 +1227,7 @@ NET_DEVICE_INIT(socket_can_stm32_1, SOCKET_CAN_NAME_1, socket_can_init_1,
static void config_can_2_irq(CAN_TypeDef *can); static void config_can_2_irq(CAN_TypeDef *can);
PINCTRL_DT_DEFINE(DT_NODELABEL(can2)) PINCTRL_DT_DEFINE(DT_NODELABEL(can2));
static const struct can_stm32_config can_stm32_cfg_2 = { static const struct can_stm32_config can_stm32_cfg_2 = {
.can = (CAN_TypeDef *)DT_REG_ADDR(DT_NODELABEL(can2)), .can = (CAN_TypeDef *)DT_REG_ADDR(DT_NODELABEL(can2)),

4
drivers/can/can_stm32fd.c
View file

@ -234,7 +234,7 @@ static void config_can_##inst##_irq(void) \
#define CAN_STM32FD_CFG_INST(inst) \ #define CAN_STM32FD_CFG_INST(inst) \
\ \
PINCTRL_DT_INST_DEFINE(inst) \ PINCTRL_DT_INST_DEFINE(inst); \
\ \
static const struct can_stm32fd_config can_stm32fd_cfg_##inst = { \ static const struct can_stm32fd_config can_stm32fd_cfg_##inst = { \
.msg_sram = (struct can_mcan_msg_sram *) \ .msg_sram = (struct can_mcan_msg_sram *) \
@ -266,7 +266,7 @@ static const struct can_stm32fd_config can_stm32fd_cfg_##inst = { \
#define CAN_STM32FD_CFG_INST(inst) \ #define CAN_STM32FD_CFG_INST(inst) \
\ \
PINCTRL_DT_INST_DEFINE(inst) \ PINCTRL_DT_INST_DEFINE(inst); \
\ \
static const struct can_stm32fd_config can_stm32fd_cfg_##inst = { \ static const struct can_stm32fd_config can_stm32fd_cfg_##inst = { \
.msg_sram = (struct can_mcan_msg_sram *) \ .msg_sram = (struct can_mcan_msg_sram *) \

2
drivers/dac/dac_gd32.c
View file

@ -150,7 +150,7 @@ static int dac_gd32_init(const struct device *dev)
return 0; return 0;
} }
PINCTRL_DT_INST_DEFINE(0) PINCTRL_DT_INST_DEFINE(0);
static struct dac_gd32_data dac_gd32_data_0; static struct dac_gd32_data dac_gd32_data_0;

2
drivers/dac/dac_stm32.c
View file

@ -144,7 +144,7 @@ static const struct dac_driver_api api_stm32_driver_api = {
#define STM32_DAC_INIT(index) \ #define STM32_DAC_INIT(index) \
\ \
PINCTRL_DT_INST_DEFINE(index) \ PINCTRL_DT_INST_DEFINE(index); \
\ \
static const struct dac_stm32_cfg dac_stm32_cfg_##index = { \ static const struct dac_stm32_cfg dac_stm32_cfg_##index = { \
.base = (DAC_TypeDef *)DT_INST_REG_ADDR(index), \ .base = (DAC_TypeDef *)DT_INST_REG_ADDR(index), \

2
drivers/disk/sdmmc_stm32.c
View file

@ -484,7 +484,7 @@ err_card_detect:
#if DT_NODE_HAS_STATUS(DT_DRV_INST(0), okay) #if DT_NODE_HAS_STATUS(DT_DRV_INST(0), okay)
PINCTRL_DT_INST_DEFINE(0) PINCTRL_DT_INST_DEFINE(0);
static void stm32_sdmmc_irq_config_func(const struct device *dev) static void stm32_sdmmc_irq_config_func(const struct device *dev)
{ {

2
drivers/ethernet/eth_dwmac_stm32h7x.c
View file

@ -27,7 +27,7 @@ LOG_MODULE_REGISTER(LOG_MODULE_NAME);
#include "eth_dwmac_priv.h" #include "eth_dwmac_priv.h"
PINCTRL_DT_INST_DEFINE(0) PINCTRL_DT_INST_DEFINE(0);
static const struct pinctrl_dev_config *eth0_pcfg = static const struct pinctrl_dev_config *eth0_pcfg =
PINCTRL_DT_INST_DEV_CONFIG_GET(0); PINCTRL_DT_INST_DEV_CONFIG_GET(0);

2
drivers/ethernet/eth_stm32_hal.c
View file

@ -1085,7 +1085,7 @@ static void eth0_irq_config(void)
irq_enable(DT_INST_IRQN(0)); irq_enable(DT_INST_IRQN(0));
} }
PINCTRL_DT_INST_DEFINE(0) PINCTRL_DT_INST_DEFINE(0);
static const struct eth_stm32_hal_dev_cfg eth0_config = { static const struct eth_stm32_hal_dev_cfg eth0_config = {
.config_func = eth0_irq_config, .config_func = eth0_irq_config,

2
drivers/flash/flash_stm32_qspi.c
View file

@ -859,7 +859,7 @@ static void flash_stm32_qspi_irq_config_func(const struct device *dev);
#define STM32_QSPI_NODE DT_INST_PARENT(0) #define STM32_QSPI_NODE DT_INST_PARENT(0)
PINCTRL_DT_DEFINE(STM32_QSPI_NODE) PINCTRL_DT_DEFINE(STM32_QSPI_NODE);
static const struct flash_stm32_qspi_config flash_stm32_qspi_cfg = { static const struct flash_stm32_qspi_config flash_stm32_qspi_cfg = {
.regs = (QUADSPI_TypeDef *)DT_REG_ADDR(STM32_QSPI_NODE), .regs = (QUADSPI_TypeDef *)DT_REG_ADDR(STM32_QSPI_NODE),

2
drivers/i2c/i2c_ll_stm32.c
View file

@ -327,7 +327,7 @@ STM32_I2C_IRQ_HANDLER_DECL(name); \
\ \
DEFINE_TIMINGS(name) \ DEFINE_TIMINGS(name) \
\ \
PINCTRL_DT_DEFINE(DT_NODELABEL(name)) \ PINCTRL_DT_DEFINE(DT_NODELABEL(name)); \
\ \
static const struct i2c_stm32_config i2c_stm32_cfg_##name = { \ static const struct i2c_stm32_config i2c_stm32_cfg_##name = { \
.i2c = (I2C_TypeDef *)DT_REG_ADDR(DT_NODELABEL(name)), \ .i2c = (I2C_TypeDef *)DT_REG_ADDR(DT_NODELABEL(name)), \

2
drivers/i2s/i2s_ll_stm32.c
View file

@ -894,7 +894,7 @@ static const struct device *get_dev_from_tx_dma_channel(uint32_t dma_channel)
\ \
static void i2s_stm32_irq_config_func_##index(const struct device *dev);\ static void i2s_stm32_irq_config_func_##index(const struct device *dev);\
\ \
PINCTRL_DT_DEFINE(DT_NODELABEL(i2s##index)) \ PINCTRL_DT_DEFINE(DT_NODELABEL(i2s##index)); \
\ \
static const struct i2s_stm32_cfg i2s_stm32_config_##index = { \ static const struct i2s_stm32_cfg i2s_stm32_config_##index = { \
.i2s = (SPI_TypeDef *) DT_REG_ADDR(DT_NODELABEL(i2s##index)), \ .i2s = (SPI_TypeDef *) DT_REG_ADDR(DT_NODELABEL(i2s##index)), \

2
drivers/memc/memc_stm32.c
View file

@ -46,7 +46,7 @@ static int memc_stm32_init(const struct device *dev)
return 0; return 0;
} }
PINCTRL_DT_INST_DEFINE(0) PINCTRL_DT_INST_DEFINE(0);
static const struct memc_stm32_config config = { static const struct memc_stm32_config config = {
.fmc = DT_INST_REG_ADDR(0), .fmc = DT_INST_REG_ADDR(0),

2
drivers/pwm/pwm_stm32.c
View file

@ -662,7 +662,7 @@ replaced by 'st,prescaler' property in parent node, aka timers"
static struct pwm_stm32_data pwm_stm32_data_##index; \ static struct pwm_stm32_data pwm_stm32_data_##index; \
IRQ_CONFIG_FUNC(index) \ IRQ_CONFIG_FUNC(index) \
\ \
PINCTRL_DT_INST_DEFINE(index) \ PINCTRL_DT_INST_DEFINE(index); \
\ \
static const struct pwm_stm32_config pwm_stm32_config_##index = { \ static const struct pwm_stm32_config pwm_stm32_config_##index = { \
.timer = (TIM_TypeDef *)DT_REG_ADDR(DT_INST_PARENT(index)), \ .timer = (TIM_TypeDef *)DT_REG_ADDR(DT_INST_PARENT(index)), \

2
drivers/serial/uart_nrfx_uarte.c
View file

@ -1983,7 +1983,7 @@ static int uarte_nrfx_pm_action(const struct device *dev,
#define UART_NRF_UARTE_DEVICE(idx) \ #define UART_NRF_UARTE_DEVICE(idx) \
UARTE_INT_DRIVEN(idx); \ UARTE_INT_DRIVEN(idx); \
UARTE_ASYNC(idx); \ UARTE_ASYNC(idx); \
IF_ENABLED(CONFIG_PINCTRL, (PINCTRL_DT_DEFINE(UARTE(idx)))) \ IF_ENABLED(CONFIG_PINCTRL, (PINCTRL_DT_DEFINE(UARTE(idx));)) \
static struct uarte_nrfx_data uarte_##idx##_data = { \ static struct uarte_nrfx_data uarte_##idx##_data = { \
UARTE_CONFIG(idx), \ UARTE_CONFIG(idx), \
IF_ENABLED(CONFIG_UART_##idx##_ASYNC, \ IF_ENABLED(CONFIG_UART_##idx##_ASYNC, \

2
drivers/serial/uart_stm32.c
View file

@ -1688,7 +1688,7 @@ static void uart_stm32_irq_config_func_##index(const struct device *dev) \
#define STM32_UART_INIT(index) \ #define STM32_UART_INIT(index) \
STM32_UART_IRQ_HANDLER_DECL(index) \ STM32_UART_IRQ_HANDLER_DECL(index) \
\ \
PINCTRL_DT_INST_DEFINE(index) \ PINCTRL_DT_INST_DEFINE(index); \
\ \
static const struct uart_stm32_config uart_stm32_cfg_##index = { \ static const struct uart_stm32_config uart_stm32_cfg_##index = { \
.uconf = { \ .uconf = { \

2
drivers/serial/usart_gd32.c
View file

@ -308,7 +308,7 @@ static const struct uart_driver_api usart_gd32_driver_api = {
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ #endif /* CONFIG_UART_INTERRUPT_DRIVEN */
#define GD32_USART_INIT(n) \ #define GD32_USART_INIT(n) \
PINCTRL_DT_INST_DEFINE(n) \ PINCTRL_DT_INST_DEFINE(n); \
GD32_USART_IRQ_HANDLER(n) \ GD32_USART_IRQ_HANDLER(n) \
static struct gd32_usart_data usart_gd32_data_##n = { \ static struct gd32_usart_data usart_gd32_data_##n = { \
.baud_rate = DT_INST_PROP(n, current_speed), \ .baud_rate = DT_INST_PROP(n, current_speed), \

2
drivers/spi/spi_ll_stm32.c
View file

@ -941,7 +941,7 @@ static void spi_stm32_irq_config_func_##id(const struct device *dev) \
#define STM32_SPI_INIT(id) \ #define STM32_SPI_INIT(id) \
STM32_SPI_IRQ_HANDLER_DECL(id); \ STM32_SPI_IRQ_HANDLER_DECL(id); \
\ \
PINCTRL_DT_INST_DEFINE(id) \ PINCTRL_DT_INST_DEFINE(id); \
\ \
static const struct spi_stm32_config spi_stm32_cfg_##id = { \ static const struct spi_stm32_config spi_stm32_cfg_##id = { \
.spi = (SPI_TypeDef *) DT_INST_REG_ADDR(id), \ .spi = (SPI_TypeDef *) DT_INST_REG_ADDR(id), \

2
drivers/usb/device/usb_dc_stm32.c
View file

@ -61,7 +61,7 @@ LOG_MODULE_REGISTER(usb_dc_stm32);
#define USB_MAXIMUM_SPEED DT_INST_PROP(0, maximum_speed) #define USB_MAXIMUM_SPEED DT_INST_PROP(0, maximum_speed)
#endif #endif
PINCTRL_DT_INST_DEFINE(0) PINCTRL_DT_INST_DEFINE(0);
static const struct pinctrl_dev_config *usb_pcfg = static const struct pinctrl_dev_config *usb_pcfg =
PINCTRL_DT_INST_DEV_CONFIG_GET(0); PINCTRL_DT_INST_DEV_CONFIG_GET(0);

2
include/drivers/pinctrl.h
View file

@ -240,7 +240,7 @@ struct pinctrl_dev_config {
Z_PINCTRL_STATES_DEFINE(node_id) \ Z_PINCTRL_STATES_DEFINE(node_id) \
Z_PINCTRL_DEV_CONFIG_CONST Z_PINCTRL_DEV_CONFIG_STATIC \ Z_PINCTRL_DEV_CONFIG_CONST Z_PINCTRL_DEV_CONFIG_STATIC \
struct pinctrl_dev_config Z_PINCTRL_DEV_CONFIG_NAME(node_id) = \ struct pinctrl_dev_config Z_PINCTRL_DEV_CONFIG_NAME(node_id) = \
Z_PINCTRL_DEV_CONFIG_INIT(node_id); Z_PINCTRL_DEV_CONFIG_INIT(node_id)
/** /**
* @brief Define all pin control information for the given compatible index. * @brief Define all pin control information for the given compatible index.

2
tests/drivers/pinctrl/common/test_device.c
View file

@ -19,7 +19,7 @@ int test_device_init(const struct device *dev)
} }
#define PINCTRL_DEVICE_INIT(inst) \ #define PINCTRL_DEVICE_INIT(inst) \
PINCTRL_DT_INST_DEFINE(inst) \ PINCTRL_DT_INST_DEFINE(inst); \
\ \
DEVICE_DT_INST_DEFINE(inst, test_device_init, NULL, NULL, NULL, \ DEVICE_DT_INST_DEFINE(inst, test_device_init, NULL, NULL, NULL, \
POST_KERNEL, \ POST_KERNEL, \