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boards: riscv: tlsr9518adk80d: add Telink B91 SPI driver support

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Added SPI driver board support.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
This commit is contained in:
Yuriy Vynnychek 2021-08-05 12:16:40 +03:00 • committed by Christopher Friedt
commit 5d9d35dbb2
3 changed files with 21 additions and 1 deletions
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3
boards/riscv/tlsr9518adk80d/Kconfig.defconfig
View file

@ -27,6 +27,9 @@ config ENTROPY_TELINK_B91_TRNG
config SOC_FLASH_TELINK_B91
default y if FLASH
config SPI_TELINK_B91
default y if SPI
config IEEE802154_TELINK_B91
default y if IEEE802154

7
boards/riscv/tlsr9518adk80d/doc/index.rst
View file

@ -71,6 +71,8 @@ The Zephyr TLSR9518ADK80D board configuration supports the following hardware fe
+----------------+------------+------------------------------+
| RADIO | on-chip | ieee802154, OpenThread |
+----------------+------------+------------------------------+
| SPI (Master) | on-chip | spi |
+----------------+------------+------------------------------+
The following example projects are supported:
@ -103,8 +105,9 @@ Limitations
-----------
- Maximum 3 GPIO pins could be configured to generate interrupts simultaneously. All pins must be related to different ports and use different IRQ numbers.
- DMA mode is not supported by Serial Port.
- DMA mode is not supported by I2C, SPI and Serial Port.
- UART hardware flow control is not implemented.
- SPI Slave mode is not implemented.
Default configuration and IOs
=============================
@ -145,6 +148,8 @@ Peripheral's pins on the SoC are mapped to the following GPIO pins in the
- UART0 RX: PB2, TX: PB3
- UART1 RX: PC6, TX: PC7
- PWM Channel 0: PB4
- PSPI CS0: PC4, CLK: PC5, MISO: PC6, MOSI: PC7
- HSPI CS0: PA1, CLK: PA2, MISO: PA3, MOSI: PA4
Serial Port
-----------

12
boards/riscv/tlsr9518adk80d/tlsr9518adk80d.dts
View file

@ -121,6 +121,18 @@
pinctrl-0 = <&pwm_ch0_pb4>;
};
&pspi {
status = "okay";
cs0-pin = "PSPI_CSN_PC4";
pinctrl-0 = <&pspi_clk_pc5 &pspi_miso_io1_pc6 &pspi_mosi_io0_pc7>;
};
&hspi {
status = "okay";
cs0-pin = "HSPI_CSN_PA1";
pinctrl-0 = <&hspi_clk_pa2 &hspi_miso_io1_pa3 &hspi_mosi_io0_pa4>;
};
&flash_mspi {
partitions {
compatible = "fixed-partitions";