diff --git a/drivers/audio/intel_dmic.c b/drivers/audio/intel_dmic.c index 05654ed3e24..fb025812d59 100644 --- a/drivers/audio/intel_dmic.c +++ b/drivers/audio/intel_dmic.c @@ -22,6 +22,9 @@ #include "intel_dmic.h" #include "decimation/pdm_decim_fir.h" +#define DMA_CHANNEL_DMIC_RXA DT_INST_DMAS_CELL_BY_NAME(0, rx_a, channel) +#define DMA_CHANNEL_DMIC_RXB DT_INST_DMAS_CELL_BY_NAME(0, rx_b, channel) + #define LOG_LEVEL CONFIG_AUDIO_DMIC_LOG_LEVEL #include LOG_MODULE_REGISTER(audio_dmic); @@ -1388,9 +1391,9 @@ int dmic_configure_dma(struct pcm_stream_cfg *config, uint8_t num_streams) .dma_callback = dmic_dma_callback, }; - dmic_private.dma_dev = device_get_binding(DMIC_DMA_DEV_NAME); - if (!dmic_private.dma_dev) { - LOG_ERR("Failed to bind to device: %s", DMIC_DMA_DEV_NAME); + dmic_private.dma_dev = DEVICE_DT_GET(DT_INST_DMAS_CTLR_BY_IDX(0, 0)); + if (!device_is_ready(dmic_private.dma_dev)) { + LOG_ERR("Failed - device is not ready: %s", dmic_private.dma_dev->name); return -ENODEV; } diff --git a/drivers/audio/intel_dmic.h b/drivers/audio/intel_dmic.h index 04f22a09b6a..e3012019dc0 100644 --- a/drivers/audio/intel_dmic.h +++ b/drivers/audio/intel_dmic.h @@ -222,10 +222,6 @@ /* max number of streams supported by hardware 2 = Stream A & B */ #define DMIC_MAX_STREAMS 2 -#define DMIC_DMA_DEV_NAME CONFIG_DMA_0_NAME -#define DMA_CHANNEL_DMIC_RXA 0 -#define DMA_CHANNEL_DMIC_RXB 1 - #define DMA_HANDSHAKE_DMIC_RXA 0 #define DMA_HANDSHAKE_DMIC_RXB 1 diff --git a/soc/xtensa/intel_s1000/soc.h b/soc/xtensa/intel_s1000/soc.h index 51651b28d58..7c9eafdcbbf 100644 --- a/soc/xtensa/intel_s1000/soc.h +++ b/soc/xtensa/intel_s1000/soc.h @@ -62,14 +62,6 @@ #define DMA_HANDSHAKE_SSP3_TX 8 #define DMA_HANDSHAKE_SSP3_RX 9 -/* DMA Channel Allocation - * FIXME: I2S Driver assigns channel in Kconfig. - * Perhaps DTS is a better option - */ -#define DMIC_DMA_DEV_NAME CONFIG_DMA_0_NAME -#define DMA_CHANNEL_DMIC_RXA 0 -#define DMA_CHANNEL_DMIC_RXB 1 - /* I2S */ #define I2S_CAVS_IRQ(i2s_num) \ SOC_AGGREGATE_IRQ(0, (i2s_num) + 1, CAVS_L2_AGG_INT_LEVEL5)