michaelh/zephyr
1
0
Fork 0
Code Releases Activity

Relocate misplaced pipe buffer code

Browse source 
Several pipe buffer definitions now reside with the other
pipe buffer code. (One routine is also made non-global,
since it only referenced by the pipe buffer code itself.)

Change-Id: I76785d113edd62c9626a7116c9206472656128ec
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
This commit is contained in:
Allan Stephens 2015-05-22 09:30:15 -04:00 • committed by Anas Nashif
commit 5ce539ca21
3 changed files with 125 additions and 126 deletions
Download patch file Download diff file Expand all files Collapse all files

21
kernel/microkernel/include/k_pipe_buffer.h
View file

@ -39,27 +39,6 @@ extern "C" {
#include <kernel_struct.h>
/* low-level parameters: */
#define STORE_NBR_MARKERS
/* NOTE: the number of pending write and read Xfers is always stored,
as it is required for the channels to function properly. It is stored in the
field ChBuff.iNbrPendingWrites and iNbrPendingReads.
In the Writer and Reader MarkersList, the number of markers (==nbr. of
unreleased Xfers)
is monitored as well. They actually equal iNbrPendingWrites and
iNbrPendingReads.
Their existence depends on STORE_NBR_MARKERS. A reason to have them
additionally is that
some extra consistency checking is performed in the markers manipulation
functionality
itself.
Drawback: double storage of nbr. of pending write Xfers (but for test
purposes this is
acceptable I think)
*/
void BuffInit(unsigned char *pBuffer, int *piBuffSize, struct chbuff *pChBuff);
void BuffGetFreeSpaceTotal(struct chbuff *pBuff, int *piTotalFreeSpace);

125
kernel/microkernel/k_pipe_buffer.c
View file

@ -43,6 +43,25 @@
#include <sections.h>
#include <misc/__assert.h>
#define STORE_NBR_MARKERS
/* NOTE: the number of pending write and read Xfers is always stored,
as it is required for the channels to function properly. It is stored in the
field ChBuff.iNbrPendingWrites and iNbrPendingReads.
In the Writer and Reader MarkersList, the number of markers (==nbr. of
unreleased Xfers)
is monitored as well. They actually equal iNbrPendingWrites and
iNbrPendingReads.
Their existence depends on STORE_NBR_MARKERS. A reason to have them
additionally is that
some extra consistency checking is performed in the markers manipulation
functionality
itself.
Drawback: double storage of nbr. of pending write Xfers (but for test
purposes this is
acceptable I think)
*/
#define CHECK_CHBUFF_POINTER(pData) \
__ASSERT_NO_MSG(pChBuff->pBegin <= pData && pData < pChBuff->pEnd)
@ -677,3 +696,109 @@ void BuffDeQA_End(struct chbuff *pChBuff, int iTransferID,
AsyncDeQFinished(pChBuff, iTransferID);
}
/**********************/
/* Buffer instrusion */
/**********************/
static BOOL AreasCheck4Intrusion(unsigned char *pBegin1, int iSize1,
unsigned char *pBegin2, int iSize2)
{
unsigned char *pEnd1;
unsigned char *pEnd2;
pEnd1 = pBegin1 + OCTET_TO_SIZEOFUNIT(iSize1);
pEnd2 = pBegin2 + OCTET_TO_SIZEOFUNIT(iSize2);
/*
* 2 tests are required to determine the status of the 2 areas,
* in terms of their position wrt each other
*/
if (pBegin2 >= pBegin1) {
/* check intrusion of pBegin2 in [pBegin1, pEnd1( */
if (pBegin2 < pEnd1) {
/* intrusion!! */
return TRUE;
} else {
/* pBegin2 lies outside and to the right of the first area,
intrusion is impossible */
return FALSE;
}
} else {
/* pBegin2 lies to the left of (pBegin1, pEnd1) */
/* check end pointer: is pEnd2 in (pBegin1, pEnd1( ?? */
if (pEnd2 > pBegin1) {
/* intrusion!! */
return TRUE;
} else {
/* pEnd2 lies outside and to the left of the first area,
intrusion is impossible */
return FALSE;
}
}
}
void ChannelCheck4Intrusion(struct chbuff *pChBuff,
unsigned char *pBegin, int iSize)
{
/*
* check possible collision with all existing data areas,
* both for read and write areas
*/
int index;
struct marker_list *pMarkerList;
/* write markers */
#ifdef STORE_NBR_MARKERS
/* first a small consistency check */
if (0 == pChBuff->WriteMarkers.iNbrMarkers) {
__ASSERT_NO_MSG(-1 == pChBuff->WriteMarkers.iFirstMarker);
__ASSERT_NO_MSG(-1 == pChBuff->WriteMarkers.iLastMarker);
__ASSERT_NO_MSG(-1 == pChBuff->WriteMarkers.iAWAMarker);
}
#endif
pMarkerList = &(pChBuff->WriteMarkers);
index = pMarkerList->iFirstMarker;
while (-1 != index) {
struct marker *pM;
pM = &(pMarkerList->aMarkers[index]);
if (0 != AreasCheck4Intrusion(pBegin, iSize, pM->pointer, pM->size)) {
__ASSERT_NO_MSG(1 == 0);
}
index = pM->Next;
}
/* read markers */
#ifdef STORE_NBR_MARKERS
/* first a small consistency check */
if (0 == pChBuff->ReadMarkers.iNbrMarkers) {
__ASSERT_NO_MSG(-1 == pChBuff->ReadMarkers.iFirstMarker);
__ASSERT_NO_MSG(-1 == pChBuff->ReadMarkers.iLastMarker);
__ASSERT_NO_MSG(-1 == pChBuff->ReadMarkers.iAWAMarker);
}
#endif
pMarkerList = &(pChBuff->ReadMarkers);
index = pMarkerList->iFirstMarker;
while (-1 != index) {
struct marker *pM;
pM = &(pMarkerList->aMarkers[index]);
if (0 != AreasCheck4Intrusion(pBegin, iSize, pM->pointer, pM->size)) {
__ASSERT_NO_MSG(1 == 0);
}
index = pM->Next;
}
}

105
kernel/microkernel/k_pipe_util.c
View file

@ -164,108 +164,3 @@ int ChReqSizeLeft(struct k_chproc *pChProc)
{
return (pChProc->iSizeTotal - pChProc->iSizeXferred);
}
BOOL AreasCheck4Intrusion(unsigned char *pBegin1, int iSize1,
unsigned char *pBegin2, int iSize2);
void ChannelCheck4Intrusion(struct chbuff *pChBuff,
unsigned char *pBegin, int iSize)
{
/*
* check possible collision with all existing data areas,
* both for read and write areas
*/
int index;
struct marker_list *pMarkerList;
/* write markers */
#ifdef STORE_NBR_MARKERS
/* first a small consistency check */
if (0 == pChBuff->WriteMarkers.iNbrMarkers) {
__ASSERT_NO_MSG(-1 == pChBuff->WriteMarkers.iFirstMarker);
__ASSERT_NO_MSG(-1 == pChBuff->WriteMarkers.iLastMarker);
__ASSERT_NO_MSG(-1 == pChBuff->WriteMarkers.iAWAMarker);
}
#endif
pMarkerList = &(pChBuff->WriteMarkers);
index = pMarkerList->iFirstMarker;
while (-1 != index) {
struct marker *pM;
pM = &(pMarkerList->aMarkers[index]);
if (0 != AreasCheck4Intrusion(pBegin, iSize, pM->pointer, pM->size)) {
__ASSERT_NO_MSG(1 == 0);
}
index = pM->Next;
}
/* read markers */
#ifdef STORE_NBR_MARKERS
/* first a small consistency check */
if (0 == pChBuff->ReadMarkers.iNbrMarkers) {
__ASSERT_NO_MSG(-1 == pChBuff->ReadMarkers.iFirstMarker);
__ASSERT_NO_MSG(-1 == pChBuff->ReadMarkers.iLastMarker);
__ASSERT_NO_MSG(-1 == pChBuff->ReadMarkers.iAWAMarker);
}
#endif
pMarkerList = &(pChBuff->ReadMarkers);
index = pMarkerList->iFirstMarker;
while (-1 != index) {
struct marker *pM;
pM = &(pMarkerList->aMarkers[index]);
if (0 != AreasCheck4Intrusion(pBegin, iSize, pM->pointer, pM->size)) {
__ASSERT_NO_MSG(1 == 0);
}
index = pM->Next;
}
}
BOOL AreasCheck4Intrusion(unsigned char *pBegin1, int iSize1,
unsigned char *pBegin2, int iSize2)
{
unsigned char *pEnd1;
unsigned char *pEnd2;
pEnd1 = pBegin1 + OCTET_TO_SIZEOFUNIT(iSize1);
pEnd2 = pBegin2 + OCTET_TO_SIZEOFUNIT(iSize2);
/*
* 2 tests are required to determine the status of the 2 areas,
* in terms of their position wrt each other
*/
if (pBegin2 >= pBegin1) {
/* check intrusion of pBegin2 in [pBegin1, pEnd1( */
if (pBegin2 < pEnd1) {
/* intrusion!! */
return TRUE;
} else {
/* pBegin2 lies outside and to the right of the first area,
intrusion is impossible */
return FALSE;
}
} else {
/* pBegin2 lies to the left of (pBegin1, pEnd1) */
/* check end pointer: is pEnd2 in (pBegin1, pEnd1( ?? */
if (pEnd2 > pBegin1) {
/* intrusion!! */
return TRUE;
} else {
/* pEnd2 lies outside and to the left of the first area,
intrusion is impossible */
return FALSE;
}
}
}