diff --git a/drivers/pinctrl/CMakeLists.txt b/drivers/pinctrl/CMakeLists.txt
index 1dce91d5977..5c99dd82e8f 100644
--- a/drivers/pinctrl/CMakeLists.txt
+++ b/drivers/pinctrl/CMakeLists.txt
@@ -38,5 +38,6 @@ zephyr_library_sources_ifdef(CONFIG_PINCTRL_MCI_IO_MUX pinctrl_mci_io_mux.c)
 zephyr_library_sources_ifdef(CONFIG_PINCTRL_ENE_KB1200 pinctrl_ene_kb1200.c)
 zephyr_library_sources_ifdef(CONFIG_PINCTRL_IMX_SCU pinctrl_imx_scu.c)
 zephyr_library_sources_ifdef(CONFIG_PINCTRL_MAX32 pinctrl_max32.c)
+zephyr_library_sources_ifdef(CONFIG_PINCTRL_IMX_SCMI pinctrl_imx_scmi.c)
 
 add_subdirectory(renesas)
diff --git a/drivers/pinctrl/Kconfig.imx b/drivers/pinctrl/Kconfig.imx
index d12571786a0..ceb61d74513 100644
--- a/drivers/pinctrl/Kconfig.imx
+++ b/drivers/pinctrl/Kconfig.imx
@@ -1,4 +1,4 @@
-# Copyright (c) 2022 NXP
+# Copyright 2022, 2024 NXP
 # SPDX-License-Identifier: Apache-2.0
 
 config PINCTRL_IMX
@@ -16,6 +16,13 @@ config PINCTRL_IMX_SCU
 	help
 	  Enable pin controller driver for SCU-based NXP i.MX SoCs.
 
+config PINCTRL_IMX_SCMI
+	bool "Pin controller SCMI-based driver for i.MX SoCs"
+	depends on ARM_SCMI_PINCTRL_HELPERS
+	default y
+	help
+	  Enable pin controller SCMI-based driver for NXP i.MX SoCs.
+
 # TODO: Find better place for this option
 config MCUX_XBARA
 	bool "MCUX XBARA driver"
diff --git a/drivers/pinctrl/pinctrl_imx_scmi.c b/drivers/pinctrl/pinctrl_imx_scmi.c
new file mode 100644
index 00000000000..501f03edcb8
--- /dev/null
+++ b/drivers/pinctrl/pinctrl_imx_scmi.c
@@ -0,0 +1,68 @@
+/*
+ * Copyright 2024 NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/drivers/pinctrl.h>
+#include <zephyr/drivers/firmware/scmi/pinctrl.h>
+
+static int scmi_pinctrl_configure_pin(const pinctrl_soc_pin_t *pin)
+{
+	struct scmi_pinctrl_settings settings;
+	int ret, config_num;
+
+	config_num = 0;
+
+	/* set mux value, and daisy */
+	settings.id = (pin->pinmux.mux_register - IOMUXC_MUXREG) / 4;
+	settings.config[0] = PIN_CONFIG_TYPE_MUX;
+	settings.config[1] = IOMUXC_INPUT_ENABLE(pin->pin_ctrl_flags)
+				     ? (pin->pinmux.mux_mode | IOMUXC_SION(1))
+				     : pin->pinmux.mux_mode;
+	config_num++;
+
+	if (pin->pinmux.input_register) {
+		settings.config[2] = PIN_CONFIG_TYPE_DAISY_ID;
+		settings.config[3] = (pin->pinmux.input_register - IOMUXC_DAISYREG) / 4;
+		config_num++;
+
+		settings.config[4] = PIN_CONFIG_TYPE_DAISY_CFG;
+		settings.config[5] = pin->pinmux.input_daisy;
+		config_num++;
+	}
+
+	settings.attributes =
+		SCMI_PINCTRL_CONFIG_ATTRIBUTES(0x0, config_num, SCMI_PINCTRL_SELECTOR_PIN);
+
+	ret = scmi_pinctrl_settings_configure(&settings);
+	if (ret < 0) {
+		return ret;
+	}
+
+	/* set config value */
+	settings.attributes = SCMI_PINCTRL_CONFIG_ATTRIBUTES(0x0, 0x1, SCMI_PINCTRL_SELECTOR_PIN);
+	settings.id = (pin->pinmux.config_register - IOMUXC_CFGREG) / 4;
+	settings.config[0] = PIN_CONFIG_TYPE_CONFIG;
+	settings.config[1] = pin->pin_ctrl_flags & (~(1 << IOMUXC_INPUT_ENABLE_SHIFT));
+
+	ret = scmi_pinctrl_settings_configure(&settings);
+	if (ret < 0) {
+		return ret;
+	}
+
+	return 0;
+}
+
+int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintptr_t reg)
+{
+	int ret;
+	/* configure all pins */
+	for (uint8_t i = 0U; i < pin_cnt; i++) {
+		ret = scmi_pinctrl_configure_pin(&pins[i]);
+		if (ret < 0) {
+			return ret;
+		}
+	}
+	return 0;
+}