From 5b9f82668b4680072a94ede9d3aa632d89615086 Mon Sep 17 00:00:00 2001 From: Yong Cong Sin Date: Tue, 12 Sep 2023 16:33:05 +0800 Subject: [PATCH] riscv: telink_b91: fix compilation Fix compilation failure due to multilevel interrupt. Signed-off-by: Yong Cong Sin --- drivers/gpio/gpio_b91.c | 2 +- dts/riscv/telink/telink_b91.dtsi | 8 ++++++++ .../riscv-privileged/telink_b91/Kconfig.defconfig.series | 3 +++ 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/gpio/gpio_b91.c b/drivers/gpio/gpio_b91.c index 45a82f71620..bc73f9db9f5 100644 --- a/drivers/gpio/gpio_b91.c +++ b/drivers/gpio/gpio_b91.c @@ -78,7 +78,7 @@ struct gpio_b91_t { struct gpio_b91_config { struct gpio_driver_config common; uint32_t gpio_base; - uint8_t irq_num; + uint32_t irq_num; uint8_t irq_priority; void (*pirq_connect)(void); }; diff --git a/dts/riscv/telink/telink_b91.dtsi b/dts/riscv/telink/telink_b91.dtsi index 85ffbf6f57f..2a6acfd5fd2 100644 --- a/dts/riscv/telink/telink_b91.dtsi +++ b/dts/riscv/telink/telink_b91.dtsi @@ -24,6 +24,12 @@ clock-frequency = <24000000>; compatible ="telink,b91", "riscv"; riscv,isa = "rv32imac_zicsr_zifencei"; + hlic: interrupt-controller { + compatible = "riscv,cpu-intc"; + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + }; }; }; @@ -124,6 +130,8 @@ #address-cells = <0>; #interrupt-cells = <2>; interrupt-controller; + interrupts-extended = <&hlic 11>; + interrupt-parent = <&cpu0>; reg = < 0xe4000000 0x00001000 0xe4002000 0x00000800 0xe4200000 0x00010000 >; diff --git a/soc/riscv/riscv-privileged/telink_b91/Kconfig.defconfig.series b/soc/riscv/riscv-privileged/telink_b91/Kconfig.defconfig.series index 43eb3a03927..986b6240750 100644 --- a/soc/riscv/riscv-privileged/telink_b91/Kconfig.defconfig.series +++ b/soc/riscv/riscv-privileged/telink_b91/Kconfig.defconfig.series @@ -50,6 +50,9 @@ config TEST_EXTRA_STACK_SIZE int default 1024 +config 2ND_LVL_INTR_00_OFFSET + default 11 + config HAS_FLASH_LOAD_OFFSET default y if BOOTLOADER_MCUBOOT