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drivers: adc: sam0: Fix adc_reference implementation

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The current sam0 adc driver not implement correctly the adc_reference
enum values. This try homonize adc input referece by tracking VDDANA
at ADC_REF_VDD_1. The ADC_REF_VDD_1_2 were fixed with correct INTVCCx
channel selection.

Fixes #45443

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This commit is contained in:
Gerson Fernando Budke 2022-05-16 20:27:58 +02:00 • committed by Marti Bolivar
commit 5b7734c926
2 changed files with 23 additions and 11 deletions
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7
drivers/adc/adc_sam0.c
View file

@ -133,7 +133,6 @@ static int adc_sam0_channel_setup(const struct device *dev,
adc->SAMPCTRL.reg = sampctrl;
wait_synchronization(adc);
uint8_t refctrl;
switch (channel_cfg->reference) {
@ -142,14 +141,14 @@ static int adc_sam0_channel_setup(const struct device *dev,
/* Enable the internal bandgap reference */
ADC_BGEN = 1;
break;
case ADC_REF_VDD_1_2:
refctrl = ADC_REFCTRL_REFSEL_VDD_1_2 | ADC_REFCTRL_REFCOMP;
break;
#ifdef ADC_REFCTRL_REFSEL_VDD_1
case ADC_REF_VDD_1:
refctrl = ADC_REFCTRL_REFSEL_VDD_1 | ADC_REFCTRL_REFCOMP;
break;
#endif
case ADC_REF_VDD_1_2:
refctrl = ADC_REFCTRL_REFSEL_VDD_1_2 | ADC_REFCTRL_REFCOMP;
break;
case ADC_REF_EXTERNAL0:
refctrl = ADC_REFCTRL_REFSEL_AREFA;
break;

27
soc/arm/atmel_sam0/common/adc_fixup_sam0.h
View file

@ -106,6 +106,9 @@
#endif
#endif /* MCLK */
/*
* All SAM0 define the internal voltage reference as 1.0V by default.
*/
#ifndef ADC_REFCTRL_REFSEL_INTERNAL
# ifdef ADC_REFCTRL_REFSEL_INTREF
# define ADC_REFCTRL_REFSEL_INTERNAL ADC_REFCTRL_REFSEL_INTREF
@ -114,18 +117,28 @@
# endif
#endif
/*
* Some SAM0 devices can use VDDANA as a direct reference. For the devices
* that not offer this option, the internal 1.0V reference will be used.
*/
#ifndef ADC_REFCTRL_REFSEL_VDD_1
# if defined(ADC0_BANDGAP)
# define ADC_REFCTRL_REFSEL_VDD_1 ADC_REFCTRL_REFSEL_INTVCC1
# elif defined(ADC_REFCTRL_REFSEL_INTVCC2)
# define ADC_REFCTRL_REFSEL_VDD_1 ADC_REFCTRL_REFSEL_INTVCC2
# endif
#endif
/*
* SAMD/E5x define ADC[0-1]_BANDGAP symbol. Only those devices use INTVCC0 to
* implement VDDANA / 2.
*/
#ifndef ADC_REFCTRL_REFSEL_VDD_1_2
# ifdef ADC_REFCTRL_REFSEL_INTVCC0
# ifdef ADC0_BANDGAP
# define ADC_REFCTRL_REFSEL_VDD_1_2 ADC_REFCTRL_REFSEL_INTVCC0
# else
# define ADC_REFCTRL_REFSEL_VDD_1_2 ADC_REFCTRL_REFSEL_INTVCC1
# endif
#endif
#ifndef ADC_REFCTRL_REFSEL_VDD_1
# ifdef ADC_REFCTRL_REFSEL_INTVCC1
# define ADC_REFCTRL_REFSEL_VDD_1 ADC_REFCTRL_REFSEL_INTVCC1
# endif
#endif
#endif /* _ATMEL_SAM0_ADC_FIXUP_H_ */