From 5b31f76113c1a6e106f94ea43c8cdf1e137f1e9c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Iv=C3=A1n=20Briano?= Date: Tue, 1 Nov 2016 18:35:44 -0200 Subject: [PATCH] uart qmsi: Use provided macros to configure IRQ MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use the macros provided by QMSI (or by ourselves, when QMSI doesn't have them yet) to register interrupts independently of which core it's building for. Change-Id: I83fd7e42598b45aef8132316906a3bff291dfe92 Signed-off-by: Iván Briano --- drivers/serial/uart_qmsi.c | 36 ++++++++++-------------------------- 1 file changed, 10 insertions(+), 26 deletions(-) diff --git a/drivers/serial/uart_qmsi.c b/drivers/serial/uart_qmsi.c index 4779646eb64..295929a3fc5 100644 --- a/drivers/serial/uart_qmsi.c +++ b/drivers/serial/uart_qmsi.c @@ -28,22 +28,6 @@ #include "soc.h" #include "qm_soc_regs.h" -/* - * The CPU-visible IRQ numbers change between the ARC and IA cores, - * and QMSI itself has no indirection. Similarly the mask needed to - * tell the SCSS how to route the IRQ depends on which CPU we need to - * receive it. - */ -#ifdef CONFIG_SOC_QUARK_SE_C1000_SS -# define UART0_IRQ QM_IRQ_UART_0_INT_VECTOR -# define UART1_IRQ QM_IRQ_UART_1_INT_VECTOR -# define SCSS_IRQ_ROUTING_MASK BIT(8) -#else -# define UART0_IRQ QM_IRQ_UART_0_INT -# define UART1_IRQ QM_IRQ_UART_1_INT -# define SCSS_IRQ_ROUTING_MASK BIT(0) -#endif - #define IIR_IID_NO_INTERRUPT_PENDING 0x01 #define DIVISOR_LOW(baudrate) \ @@ -455,22 +439,22 @@ static void uart_qmsi_isr(void *arg) #ifdef CONFIG_UART_QMSI_0 static void irq_config_func_0(struct device *dev) { - IRQ_CONNECT(UART0_IRQ, CONFIG_UART_QMSI_0_IRQ_PRI, - uart_qmsi_isr, DEVICE_GET(uart_0), - UART_IRQ_FLAGS); - irq_enable(UART0_IRQ); - QM_INTERRUPT_ROUTER->uart_0_int_mask &= ~SCSS_IRQ_ROUTING_MASK; + IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_UART_0_INT), + CONFIG_UART_QMSI_0_IRQ_PRI, uart_qmsi_isr, + DEVICE_GET(uart_0), UART_IRQ_FLAGS); + irq_enable(IRQ_GET_NUMBER(QM_IRQ_UART_0_INT)); + QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->uart_0_int_mask); } #endif /* CONFIG_UART_QMSI_0 */ #ifdef CONFIG_UART_QMSI_1 static void irq_config_func_1(struct device *dev) { - IRQ_CONNECT(UART1_IRQ, CONFIG_UART_QMSI_1_IRQ_PRI, - uart_qmsi_isr, DEVICE_GET(uart_1), - UART_IRQ_FLAGS); - irq_enable(UART1_IRQ); - QM_INTERRUPT_ROUTER->uart_1_int_mask &= ~SCSS_IRQ_ROUTING_MASK; + IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_UART_1_INT), + CONFIG_UART_QMSI_1_IRQ_PRI, uart_qmsi_isr, + DEVICE_GET(uart_1), UART_IRQ_FLAGS); + irq_enable(IRQ_GET_NUMBER(QM_IRQ_UART_1_INT)); + QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->uart_1_int_mask); } #endif /* CONFIG_UART_QMSI_1 */ #endif /* CONFIG_UART_INTERRUPT_DRIVEN */