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drivers: flash: spi nor header includes definition for OSPI commands

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With the introduction of the OSPI NOR flash controller
more octal commands and parameters are defined.
It completes the existing SPI commands

Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit is contained in:
Francois Ramu 2022-04-21 10:43:46 +02:00 • committed by Maureen Helm
commit 5b029377ab
1 changed files with 50 additions and 4 deletions
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54
drivers/flash/spi_nor.h
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@ -42,11 +42,57 @@
#define SPI_NOR_CMD_4BA 0xB7 /* Enter 4-Byte Address Mode */
#define SPI_NOR_CMD_DPD 0xB9 /* Deep Power Down */
#define SPI_NOR_CMD_RDPD 0xAB /* Release from Deep Power Down */
#define SPI_NOR_CMD_WR_CFGREG2 0x72 /* Write config register 2 */
#define SPI_NOR_CMD_RD_CFGREG2 0x71 /* Read config register 2 */
#define SPI_NOR_CMD_RESET_EN 0x66 /* Reset Enable */
#define SPI_NOR_CMD_RESET_MEM 0x99 /* Reset Memory */
#define SPI_NOR_CMD_BULKE 0x60 /* Bulk Erase */
#define SPI_NOR_CMD_PP_4B 0x12 /* Page Program 4 Byte Address */
#define SPI_NOR_CMD_READ_FAST_4B 0x0C /* Fast Read 4 Byte Address */
/* Page, sector, and block size are standard, not configurable. */
#define SPI_NOR_PAGE_SIZE 0x0100U
#define SPI_NOR_SECTOR_SIZE 0x1000U
#define SPI_NOR_BLOCK_SIZE 0x10000U
/* Flash octal opcodes */
#define SPI_NOR_OCMD_SE 0x21DE /* Octal Sector erase */
#define SPI_NOR_OCMD_CE 0xC738 /* Octal Chip erase */
#define SPI_NOR_OCMD_RDSR 0x05FA /* Octal Read status register */
#define SPI_NOR_OCMD_DTR_RD 0xEE11 /* Octal IO DTR read command */
#define SPI_NOR_OCMD_RD 0xEC13 /* Octal IO read command */
#define SPI_NOR_OCMD_PAGE_PRG 0x12ED /* Octal Page Prog*/
#define SPI_NOR_OCMD_WREN 0x06F9 /* Octal Write enable */
#define SPI_NOR_OCMD_NOP 0x00FF /* Octal No operation */
#define SPI_NOR_OCMD_RESET_EN 0x6699 /* Octal Reset Enable */
#define SPI_NOR_OCMD_RESET_MEM 0x9966 /* Octal Reset Memory */
#define SPI_NOR_OCMD_WR_CFGREG2 0x728D /* Octal Write configuration Register2 */
#define SPI_NOR_OCMD_RD_CFGREG2 0x718E /* Octal Read configuration Register2 */
#define SPI_NOR_OCMD_BULKE 0x609F /* Octa Bulk Erase */
/* Page, sector, and block size are standard, not configurable. */
#define SPI_NOR_PAGE_SIZE 0x0100U
#define SPI_NOR_SECTOR_SIZE 0x1000U
#define SPI_NOR_BLOCK_SIZE 0x10000U
/* Flash Auto-polling values */
#define SPI_NOR_WREN_MATCH 0x02
#define SPI_NOR_WREN_MASK 0x02
#define SPI_NOR_MEM_RDY_MATCH 0x00
#define SPI_NOR_MEM_RDY_MASK 0x01
#define SPI_NOR_AUTO_POLLING_INTERVAL 0x10
/* Flash Dummy Cycles values */
#define SPI_NOR_DUMMY_RD 8U
#define SPI_NOR_DUMMY_RD_OCTAL 6U
#define SPI_NOR_DUMMY_RD_OCTAL_DTR 6U
#define SPI_NOR_DUMMY_REG_OCTAL 4U
#define SPI_NOR_DUMMY_REG_OCTAL_DTR 5U
/* Memory registers address */
#define SPI_NOR_REG2_ADDR1 0x0000000
#define SPI_NOR_CR2_STR_OPI_EN 0x01
#define SPI_NOR_CR2_DTR_OPI_EN 0x02
#define SPI_NOR_REG2_ADDR3 0x00000300
#define SPI_NOR_CR2_DUMMY_CYCLES_66MHZ 0x07
/* Test whether offset is aligned to a given number of bits. */
#define SPI_NOR_IS_ALIGNED(_ofs, _bits) (((_ofs) & BIT_MASK(_bits)) == 0)