boards: add support for stm32f401_mini
Adds support for the stm32f401cc based stm32 mini f401 board. Signed-off-by: Brian Bradley <brian.bradley.p@gmail.com>
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8
boards/arm/stm32f401_mini/Kconfig.board
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boards/arm/stm32f401_mini/Kconfig.board
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# Copyright (c) 2022 Brian Bradley
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# SPDX-License-Identifier: Apache-2.0
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# STM32 Mini F401 Board
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config BOARD_STM32F401_MINI
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bool "STM32 Mini F401 Board"
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depends on SOC_STM32F401XC
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15
boards/arm/stm32f401_mini/Kconfig.defconfig
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boards/arm/stm32f401_mini/Kconfig.defconfig
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# Copyright (c) 2022 Brian Bradley
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# SPDX-License-Identifier: Apache-2.0
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# STM32 Mini F401 board definitions
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if BOARD_STM32F401_MINI
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config BOARD
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default "stm32f401_mini"
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config SPI_STM32_INTERRUPT
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default y
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depends on SPI
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endif # BOARD_STM32F401_MINI
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9
boards/arm/stm32f401_mini/board.cmake
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boards/arm/stm32f401_mini/board.cmake
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# SPDX-License-Identifier: Apache-2.0
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board_runner_args(dfu-util "--pid=0483:df11" "--alt=0" "--dfuse")
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board_runner_args(jlink "--device=STM32F401CC" "--speed=4000")
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include(${ZEPHYR_BASE}/boards/common/dfu-util.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/blackmagicprobe.board.cmake)
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BIN
boards/arm/stm32f401_mini/doc/img/STM32_Mini_F401-1.jpg
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BIN
boards/arm/stm32f401_mini/doc/img/STM32_Mini_F401-1.jpg
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After Width: | Height: | Size: 578 KiB |
154
boards/arm/stm32f401_mini/doc/index.rst
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boards/arm/stm32f401_mini/doc/index.rst
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.. _stm32f401_mini:
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STM32 Mini F401
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###############
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Overview
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********
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The STM32 Mini F401 is an extremely low cost and bare-bones
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development board featuring the STM32F401CC, see `STM32F401CC website`_.
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More info about the board with schematics available `here <stm32-base-board-page>`_
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.. image:: img/STM32_Mini_F401-1.jpg
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:align: center
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:alt: STM32 Mini F401
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Hardware
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********
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The STM32F401CC based board provides the following
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hardware components:
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- STM32F401CCU6 in UFQFPN48 package
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- ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU
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- 84 MHz max CPU frequency
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- VDD from 1.7 V to 3.6 V
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- 256 KB Flash
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- 64 KB SRAM
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- GPIO with external interrupt capability
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- 1x12-bit, 2.4 MSPS ADC with 16 channels
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- DMA Controller
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- Up to 11 Timers (six 16-bit, two 32-bit, two watchdog timers and a SysTick timer)
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- USART/UART (3)
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- I2C (3)
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- SPI/I2S (4)
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- SDIO
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- USB 2.0 full-speed device/host/OTG controller with on-chip PHY
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- CRC calculation unit
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- 96-bit unique ID
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- RTC
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Supported Features
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==================
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The Zephyr stm32f401_mini board configuration supports the following
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hardware features:
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+------------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+============+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+------------+------------+-------------------------------------+
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| SYSTICK | on-chip | system clock |
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+------------+------------+-------------------------------------+
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| UART | on-chip | serial port |
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+------------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+------------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+------------+------------+-------------------------------------+
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| FLASH | on-chip | flash |
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+------------+------------+-------------------------------------+
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| SPI | on-chip | spi |
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+------------+------------+-------------------------------------+
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| I2C | on-chip | i2c |
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+------------+------------+-------------------------------------+
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| ADC | on-chip | ADC Controller |
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+------------+------------+-------------------------------------+
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| USB OTG FS | on-chip | USB device |
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+------------+------------+-------------------------------------+
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The default configuration can be found in the defconfig file:
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``boards/arm/stm32f401_mini/stm32f401_mini_defconfig``
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Default Zephyr Peripheral Mapping:
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----------------------------------
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- UART_1 TX/RX : PA9/PA10
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- I2C1 SCL/SDA : PB8/PB9
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- SPI1 CS/SCK/MISO/MOSI : PA4/PA5/PA6/PA7
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- PWM_4_CH1 : PB6
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- PWM_4_CH2 : PB7
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- ADC_1 : PA1
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- SW0 : PB2 (routed to BOOT1 dip switch)
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- LED0 : PC13
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Clock Sources
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-------------
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The board has two external oscillators. The frequency of the slow clock (LSE) is
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32.768 kHz. The frequency of the main clock (HSE) is 25 MHz.
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The default configuration sources the system clock from the PLL, which is
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derived from HSE, and is set at 84MHz.
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Programming and Debugging
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*************************
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There are 2 main entry points for flashing STM32F4X SoCs, one using the ROM
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bootloader, and another by using the SWD debug port (which requires additional
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hardware). Flashing using the ROM bootloader requires a special activation
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pattern, which can be triggered by using the BOOT0 pin, which on this board
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is a dip switch.
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Flashing
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========
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Installing dfu-util
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-------------------
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It is recommended to use at least v0.8 of `dfu-util`_. The package available in
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debian/ubuntu can be quite old, so you might have to build dfu-util from source.
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There is also a Windows version which works, but you may have to install the
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right USB drivers with a tool like `Zadig`_.
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Flashing an Application
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-----------------------
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Connect a USB-C cable and the board should power ON. Force the board into DFU mode
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by setting the BOOT0 dip switch position to ON. Reset the board with the NRST button.
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The dfu-util runner is supported on this board and so a sample can be built and
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tested easily.
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.. zephyr-app-commands::
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:zephyr-app: samples/basic/blinky
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:board: stm32f401_mini
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:goals: build flash
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Debugging
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=========
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The board can be debugged by installing the included 100 mil (0.1 inch) header,
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and attaching an SWD debugger to the 3V3 (3.3V), GND, SCK, and DIO
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pins on that header.
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References
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**********
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.. target-notes::
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.. _Zadig:
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https://zadig.akeo.ie/
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.. _stm32-base-board-page:
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https://stm32-base.org/boards/STM32F401CCU6-STM32-Mini-F401
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.. _dfu-util:
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http://dfu-util.sourceforge.net/build.html
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.. _STM32F401CC website:
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https://www.st.com/en/microcontrollers-microprocessors/stm32f401cc.html
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137
boards/arm/stm32f401_mini/stm32f401_mini.dts
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137
boards/arm/stm32f401_mini/stm32f401_mini.dts
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/*
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* Copyright (c) 2022 Brian Bradley (brian.bradley.p@gmail.com)
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <st/f4/stm32f401Xc.dtsi>
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#include <st/f4/stm32f401c(b-c)ux-pinctrl.dtsi>
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/ {
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model = "STM32 Mini F401";
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compatible = "stm32f401_mini";
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chosen {
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zephyr,console = &usart1;
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zephyr,shell-uart = &usart1;
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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};
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leds {
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compatible = "gpio-leds";
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user_led: led {
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gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
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label = "User LED";
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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boot1: button {
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label = "BOOT1";
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gpios = <&gpiob 2 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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};
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};
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aliases {
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led0 = &user_led;
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sw0 = &boot1;
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};
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};
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&flash0 {
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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boot_partition: partition@0 {
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label = "mcuboot";
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reg = <0x00000000 0x00010000>;
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read-only;
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};
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slot0_partition: partition@20000 {
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label = "image-0";
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reg = <0x00020000 0x00020000>;
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};
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slot1_partition: partition@40000 {
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label = "image-1";
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reg = <0x00040000 0x00020000>;
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};
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scratch_partition: partition@60000 {
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label = "image-scratch";
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reg = <0x00060000 0x00020000>;
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};
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};
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};
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&timers4 {
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status = "okay";
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pwm4: pwm {
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status = "okay";
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pinctrl-0 = <&tim4_ch1_pb6 &tim4_ch2_pb7>;
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pinctrl-names = "default";
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};
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};
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&usart1 {
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pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
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pinctrl-names = "default";
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status = "okay";
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current-speed = <115200>;
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};
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&i2c1 {
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pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
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pinctrl-names = "default";
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status = "okay";
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clock-frequency = <I2C_BITRATE_FAST>;
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};
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&spi1 {
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pinctrl-0 = <&spi1_sck_pa5 &spi1_nss_pa4
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&spi1_miso_pa6 &spi1_mosi_pa7>;
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pinctrl-names = "default";
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status = "okay";
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};
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&rtc {
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status = "okay";
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};
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zephyr_udc0: &usbotg_fs {
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pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
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pinctrl-names = "default";
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status = "okay";
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};
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&adc1 {
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pinctrl-0 = <&adc1_in1_pa1>;
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pinctrl-names = "default";
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status = "okay";
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};
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&clk_hse {
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clock-frequency = <DT_FREQ_M(25)>;
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status = "okay";
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};
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&pll {
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div-m = <25>;
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mul-n = <336>;
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div-p = <4>;
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div-q = <7>;
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clocks = <&clk_hse>;
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status = "okay";
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};
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&rcc {
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clocks = <&pll>;
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clock-frequency = <DT_FREQ_M(84)>;
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ahb-prescaler = <1>;
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apb1-prescaler = <2>;
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apb2-prescaler = <1>;
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};
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16
boards/arm/stm32f401_mini/stm32f401_mini.yaml
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16
boards/arm/stm32f401_mini/stm32f401_mini.yaml
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identifier: stm32f401_mini
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name: STM32 Mini F401
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type: mcu
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arch: arm
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toolchain:
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- zephyr
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- gnuarmemb
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- xtools
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supported:
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- counter
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- spi
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- usb
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- i2c
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- uart
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- pwm
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- adc
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25
boards/arm/stm32f401_mini/stm32f401_mini_defconfig
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25
boards/arm/stm32f401_mini/stm32f401_mini_defconfig
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# SPDX-License-Identifier: Apache-2.0
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F401XC=y
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# Enable MPU
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CONFIG_ARM_MPU=y
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# Enable HW stack protection
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CONFIG_HW_STACK_PROTECTION=y
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# Serial Drivers
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CONFIG_SERIAL=y
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CONFIG_UART_INTERRUPT_DRIVEN=y
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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# Enable GPIO
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CONFIG_GPIO=y
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# Clock configuration
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CONFIG_CLOCK_CONTROL=y
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# enable pin controller
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CONFIG_PINCTRL=y
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18
boards/arm/stm32f401_mini/support/openocd.cfg
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18
boards/arm/stm32f401_mini/support/openocd.cfg
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source [find interface/stlink.cfg]
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transport select hla_swd
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source [find target/stm32f4x.cfg]
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reset_config srst_only
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$_TARGETNAME configure -event gdb-attach {
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echo "Debugger attaching: halting execution"
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reset halt
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gdb_breakpoint_override hard
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}
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$_TARGETNAME configure -event gdb-detach {
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echo "Debugger detaching: resuming execution"
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resume
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}
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@ -211,6 +211,7 @@
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#elif defined(CONFIG_BOARD_NUCLEO_L476RG) || \
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defined(CONFIG_BOARD_BLACKPILL_F411CE) || \
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defined(CONFIG_BOARD_STM32F401_MINI) || \
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defined(CONFIG_BOARD_BLACKPILL_F401CE) || \
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defined(CONFIG_BOARD_NUCLEO_L4R5ZI) || \
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defined(CONFIG_BOARD_MIKROE_CLICKER_2)
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