michaelh/zephyr
1
0
Fork 0
Code Releases Activity

arm: remove old GDB_INFO support

Browse source 
That module is not used anymore: it was introduced pre-Zephyr to add
some kind of awareness when debugging ARM Cortex-M3 code with GDB but
was never really used by anyone. It has bitrotted, and with the recent
move of the tTCS and tNANO data structures to common _kernel and
k_thread, it does not even compile anymore.

Jira: ZEP-1284, ZEP-951

Change-Id: Ic9afed00f4229324fe5d2aa97dc6f1c935953244
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2016-12-19 09:07:04 -05:00 • committed by Anas Nashif
commit 5ad2905532
15 changed files with 4 additions and 376 deletions
Download patch file Download diff file Expand all files Collapse all files

1
arch/arm/core/Makefile
View file

@ -8,7 +8,6 @@ obj-y = exc_exit.o irq_init.o \
fault_s.o isr_wrapper.o \
fatal.o sys_fatal_error_handler.o thread_abort.o
obj-$(CONFIG_GDB_INFO) += gdb_stub_irq_vector_table.o gdb_stub.o
obj-$(CONFIG_CPLUSPLUS) += __aeabi_atexit.o
obj-$(CONFIG_IRQ_OFFLOAD) += irq_offload.o
obj-$(CONFIG_CPU_CORTEX_M) += cortex_m/

9
arch/arm/core/exc_exit.S
View file

@ -37,13 +37,6 @@ GTEXT(_ExcExit)
GTEXT(_IntExit)
GDATA(_kernel)
#if CONFIG_GDB_INFO
#define _EXIT_EXC_IF_FIBER_PREEMPTED beq _ExcExitWithGdbStub
#else
#define _EXIT_EXC_IF_FIBER_PREEMPTED beq _EXIT_EXC
#endif
#define _EXIT_EXC_IF_FIBER_NOT_READY _EXIT_EXC_IF_FIBER_PREEMPTED
/**
*
* @brief Kernel housekeeping when exiting interrupt handler installed
@ -113,8 +106,6 @@ SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, _ExcExit)
_ExcExitWithGdbStub:
_GDB_STUB_EXC_EXIT
_EXIT_EXC:
#endif /* CONFIG_PREEMPT_ENABLED */

4
arch/arm/core/fault_s.S
View file

@ -72,8 +72,6 @@ SECTION_SUBSEC_FUNC(TEXT,__fault,__debug_monitor)
#endif
SECTION_SUBSEC_FUNC(TEXT,__fault,__reserved)
_GDB_STUB_EXC_ENTRY
#if defined(CONFIG_CPU_CORTEX_M0_M0PLUS)
/* force unlock interrupts */
cpsie i
@ -109,8 +107,6 @@ _stack_frame_endif:
push {lr}
bl _Fault
_GDB_STUB_EXC_EXIT
pop {pc}
.end

168
arch/arm/core/gdb_stub.S
View file

@ -1,168 +0,0 @@
/*
* Copyright (c) 2014 Wind River Systems, Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/**
* @file
* @brief Extra work performed upon exception entry/exit for GDB
*
*
* Prep work done when entering exceptions consists of saving the callee-saved
* registers before they get used by exception handlers, and recording the fact
* that we are running in an exception.
*
* Upon exception exit, it must be recorded that the task is not in an exception
* anymore.
*/
#define _ASMLANGUAGE
#include <offsets_short.h>
#include <toolchain.h>
#include <sections.h>
#include <kernel_structs.h>
#include <arch/cpu.h>
_ASM_FILE_PROLOGUE
/**
*
* @brief Exception entry extra work when GDB_INFO is enabled
*
* During normal system operation, the callee-saved registers are saved lazily
* only when a context switch is required. To allow looking at the current
* threads registers while debugging an exception/interrupt, they must be saved
* upon entry since the handler could be using them: thus, looking at the CPU
* registers would show the current system state and not the current *thread*'s
* state.
*
* Also, record the fact that the thread is currently interrupted so that VQEMU
* looks into the TCS and not the CPU registers to obtain the current thread's
* register values.
*
* NOTE:
* - must be called with interrupts locked
* - cannot use r0 without saving it first
*
* @return N/A
*/
SECTION_FUNC(TEXT, _GdbStubExcEntry)
ldr r1, =_kernel
ldr r2, [r1, #__tNANO_flags_OFFSET]
/* already in an exception, do not update the registers */
ldr r3, =EXC_ACTIVE
ands r3, r2
beq _GdbStubEditReg
bx lr
_GdbStubEditReg:
ldr r3, =EXC_ACTIVE
orrs r2, r3
str r2, [r1, #__tNANO_flags_OFFSET]
ldr r1, [r1, #__tNANO_current_OFFSET]
str r2, [r1, #__tTCS_flags_OFFSET]
/* save callee-saved + psp in TCS */
adds r1, #__tTCS_preempReg_OFFSET
mrs ip, PSP
#if defined(CONFIG_CPU_CORTEX_M0_M0PLUS)
/* Store current r4-r7 */
stmea r1!, {r4-r7}
/* copy r8-r12 into r3-r7 */
mov r3, r8
mov r4, r9
mov r5, r10
mov r6, r11
mov r7, ip
/* store r8-12 */
stmea r1!, {r3-r7}
#else /* CONFIG_CPU_CORTEX_M0_M0PLUS */
stmia r1, {v1-v8, ip}
#endif
bx lr
/**
*
* @brief Exception exit extra clean up when GDB_INFO is enabled
*
* Record the fact that the thread is not interrupted anymore so that VQEMU
* looks at the CPU registers and not into the TCS to obtain the current
* thread's register values. Only do this if this is not a nested exception.
*
* NOTE:
* - must be called with interrupts locked
* - cannot use r0 without saving it first
*
* @return N/A
*/
SECTION_FUNC(TEXT, _GdbStubExcExit)
#if !defined(CONFIG_CPU_CORTEX_M0_M0PLUS)
/* if we're nested (ie. !RETTOBASE), do not reset EXC_ACTIVE */
ldr r1, =_SCS_ICSR
ldr r1, [r1]
ands r1, #_SCS_ICSR_RETTOBASE
it eq
bxeq lr
#endif
ldr r1, =_kernel
ldr r2, [r1, #__tNANO_flags_OFFSET]
ldr r3, =EXC_ACTIVE
bics r2, r3
str r2, [r1, #__tNANO_flags_OFFSET]
ldr r1, [r1, #__tNANO_current_OFFSET]
str r2, [r1, #__tTCS_flags_OFFSET]
bx lr
/**
*
* @brief Stub for ISRs installed directly in vector table
*
* The kernel on Cortex-M3/4 can be configured so that ISRs
* are installed directly in the vector table for maximum efficiency.
*
* When OS-awareness is enabled, a stub must be inserted to invoke
* _GdbStubExcEntry() before the user ISR runs, to save the current task's
* registers. This stub thus gets inserted in the vector table instead of the
* user's ISR. The user's IRQ vector table gets pushed after the vector table
* automatically by the linker script: this is all transparent to the user.
* This stub must also act as a demuxer that find the running exception and
* invoke the user's real ISR.
*
* @return N/A
*/
SECTION_FUNC(TEXT, _irq_vector_table_entry_with_gdb_stub)
_GDB_STUB_EXC_ENTRY
mrs r0, IPSR /* get exception number */
subs r0, #16 /* get IRQ number */
ldr r1, =_irq_vector_table
/* grab real ISR at address: r1 + (r0 << 2) (table is 4-byte wide) */
lsls r3, r0, #2
ldr r1, [r1, r3]
/* jump to ISR, no return: ISR is responsible for calling _IntExit */
bx r1

38
arch/arm/core/gdb_stub_irq_vector_table.c
View file

@ -1,38 +0,0 @@
/*
* Copyright (c) 2014 Wind River Systems, Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/**
* @file
* @brief Stubs for IRQ part of vector table
*
* When GDB is enabled, the static IRQ vector table needs to install the
* _irq_vector_table_entry_with_gdb_stub stub to do some work before calling the
* user-installed ISRs.
*/
#include <toolchain.h>
#include <sections.h>
#include <arch/cpu.h>
typedef void (*vth)(void); /* Vector Table Handler */
#if defined(CONFIG_GDB_INFO) && !defined(CONFIG_SW_ISR_TABLE)
vth __gdb_stub_irq_vector_table _irq_vector_table_with_gdb_stub[CONFIG_NUM_IRQS] = {
[0 ...(CONFIG_NUM_IRQS - 1)] = _irq_vector_table_entry_with_gdb_stub
};
#endif /* CONFIG_GDB_INFO && !CONFIG_SW_ISR_TABLE */

4
arch/arm/core/isr_wrapper.S
View file

@ -53,8 +53,6 @@ GTEXT(_IntExit)
*/
SECTION_FUNC(TEXT, _isr_wrapper)
_GDB_STUB_EXC_ENTRY
push {lr} /* lr is now the first item on the stack */
#ifdef CONFIG_KERNEL_EVENT_LOGGER_INTERRUPT
@ -124,5 +122,5 @@ _idle_state_cleared:
pop {lr}
#endif /* CONFIG_CPU_CORTEX_M0_M0PLUS */
/* exception return is done in _IntExit(), including _GDB_STUB_EXC_EXIT */
/* exception return is done in _IntExit() */
b _IntExit

10
arch/arm/core/swap.S
View file

@ -55,8 +55,6 @@ GDATA(_kernel)
SECTION_FUNC(TEXT, __pendsv)
_GDB_STUB_EXC_ENTRY
#ifdef CONFIG_KERNEL_EVENT_LOGGER_CONTEXT_SWITCH
/* Register the context switch */
push {lr}
@ -181,8 +179,6 @@ _thread_irq_disabled:
msr PSP, ip
_GDB_STUB_EXC_EXIT
/* exc return */
bx lr
@ -199,8 +195,6 @@ _thread_irq_disabled:
SECTION_FUNC(TEXT, __svc)
_GDB_STUB_EXC_ENTRY
#if CONFIG_IRQ_OFFLOAD
tst lr, #0x4 /* did we come from thread mode ? */
ite eq /* if zero (equal), came from handler mode */
@ -222,7 +216,7 @@ SECTION_FUNC(TEXT, __svc)
blx _irq_do_offload /* call C routine which executes the offload */
pop {lr}
/* exception return is done in _IntExit(), including _GDB_STUB_EXC_EXIT */
/* exception return is done in _IntExit() */
b _IntExit
_context_switch:
@ -241,8 +235,6 @@ _context_switch:
ldr r2, =_SCS_ICSR_PENDSV
str r2, [r1, #0]
_GDB_STUB_EXC_EXIT
/* handler mode exit, to PendSV */
bx lr
#endif /* !CONFIG_CPU_CORTEX_M0_M0PLUS */

2
drivers/timer/Makefile
View file

@ -4,8 +4,6 @@ obj-$(CONFIG_ARCV2_TIMER) += arcv2_timer0.o
obj-$(CONFIG_ALTERA_AVALON_TIMER) += altera_avalon_timer.o
obj-$(CONFIG_NRF_RTC_TIMER) += nrf_rtc_timer.o
_CORTEX_M_SYSTICK_AND_GDB_INFO_yy = y
obj-$(CONFIG_CORTEX_M_SYSTICK) += cortex_m_systick.o
obj-$(_CORTEX_M_SYSTICK_AND_GDB_INFO_$(CONFIG_CORTEX_M_SYSTICK)$(CONFIG_GDB_INFO)) += cortex_m_systick_gdb.o
obj-y += sys_clock_init.o

16
drivers/timer/cortex_m_systick.c
View file

@ -58,17 +58,6 @@ static uint32_t clock_accumulated_count;
#include <board.h>
/*
* When GDB_INFO is enabled, the handler installed in the vector table
* (__systick), can be found in systick_gdb.s. In this case, the handler
* in this file becomes _Systick() and will be called by __systick.
*/
#ifdef CONFIG_GDB_INFO
#define _TIMER_INT_HANDLER _real_timer_int_handler
#else
#define _TIMER_INT_HANDLER _timer_int_handler
#endif
#ifdef CONFIG_TICKLESS_IDLE
#define TIMER_MODE_PERIODIC 0 /* normal running mode */
#define TIMER_MODE_ONE_SHOT 1 /* emulated, since sysTick has 1 mode */
@ -212,12 +201,11 @@ static ALWAYS_INLINE void sysTickReloadSet(
* This routine handles the system clock tick interrupt. A TICK_EVENT event
* is pushed onto the microkernel stack.
*
* The symbol for this routine is either _timer_int_handler (for normal
* system operation) or _real_timer_int_handler (when GDB_INFO is enabled).
* The symbol for this routine is either _timer_int_handler.
*
* @return N/A
*/
void _TIMER_INT_HANDLER(void *unused)
void _timer_int_handler(void *unused)
{
ARG_UNUSED(unused);

39
drivers/timer/cortex_m_systick_gdb.S
View file

@ -1,39 +0,0 @@
/*
* Copyright (c) 2014-2015 Wind River Systems, Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/**
* @file
* @brief ARM Cortex-M systick handler stub for GDB debugging
*
* GDB stub needed before the real systick handler runs to be able to display the
* correct state of the thread that was interrupted.
*/
#define _ASMLANGUAGE
#include <toolchain.h>
#include <sections.h>
#include <arch/cpu.h>
_ASM_FILE_PROLOGUE
GTEXT(_timer_int_handler)
GTEXT(_real_timer_int_handler)
SECTION_FUNC(TEXT, _timer_int_handler)
_GDB_STUB_EXC_ENTRY
b _real_timer_int_handler

1
include/arch/arm/arch.h
View file

@ -47,7 +47,6 @@ extern "C" {
#include <arch/arm/cortex_m/scb.h>
#include <arch/arm/cortex_m/nvic.h>
#include <arch/arm/cortex_m/memory_map.h>
#include <arch/arm/cortex_m/gdb_stub.h>
#include <arch/arm/cortex_m/asm_inline.h>
#include <arch/arm/cortex_m/addr_types.h>
#include <arch/arm/cortex_m/sys_io.h>

72
include/arch/arm/cortex_m/gdb_stub.h
View file

@ -1,72 +0,0 @@
/*
* Copyright (c) 2014 Wind River Systems, Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/**
* @file
* @brief Extra work performed upon exception entry/exit for GDB
*
*
* Prep work done when entering exceptions consists of saving the callee-saved
* registers before they get used by exception handlers, and recording the fact
* that we are running in an exception.
*/
#ifndef _GDB_STUB__H_
#define _GDB_STUB__H_
#ifdef __cplusplus
extern "C" {
#endif
#ifdef _ASMLANGUAGE
#if CONFIG_GDB_INFO
GTEXT(_GdbStubExcEntry)
_GDB_STUB_EXC_ENTRY : .macro
push {lr}
bl irq_lock
bl _GdbStubExcEntry
bl irq_unlock
pop {r1}
move lr, r1
.endm
GTEXT(_GdbStubExcExit)
_GDB_STUB_EXC_EXIT : .macro
push {lr}
bl irq_lock
bl _GdbStubExcExit
bl irq_unlock
pop {r1}
move lr, r1
.endm
GTEXT(_irq_vector_table_entry_with_gdb_stub)
#else
#define _GDB_STUB_EXC_ENTRY
#define _GDB_STUB_EXC_EXIT
#endif /* CONFIG_GDB_INFO */
#else
extern void _irq_vector_table_entry_with_gdb_stub(void);
#endif /* _ASMLANGUAGE */
#ifdef __cplusplus
}
#endif
#endif /* _GDB_STUB__H_ */

5
include/arch/arm/cortex_m/scripts/linker.ld
View file

@ -85,11 +85,6 @@ SECTIONS
KEEP(*(.exc_vector_table))
KEEP(*(".exc_vector_table.*"))
#if defined(CONFIG_GDB_INFO) && !defined(CONFIG_SW_ISR_TABLE)
KEEP(*(.gdb_stub_irq_vector_table))
KEEP(*(".gdb_stub_irq_vector_table.*"))
#endif
KEEP(*(.irq_vector_table))
KEEP(*(".irq_vector_table.*"))

7
include/section_tags.h
View file

@ -37,14 +37,7 @@
#define __security_frdm_k64f_section __in_section(SECURITY_FRDM_K64F, \
_FILE_PATH_HASH, __COUNTER__)
#if defined(CONFIG_GDB_INFO) && !defined(CONFIG_SW_ISR_TABLE)
#define __gdb_stub_irq_vector_table __in_section(GDB_STUB_IRQ_VECTOR_TABLE, \
_FILE_PATH_HASH, __COUNTER__)
#endif /* CONFIG_GDB_INFO && !CONFIG_SW_ISR_TABLE */
#elif defined(CONFIG_ARC)
#define __irq_vector_table \
__in_section(IRQ_VECTOR_TABLE, _FILE_PATH_HASH, __COUNTER__)

4
include/sections.h
View file

@ -56,10 +56,6 @@
#define SECURITY_FRDM_K64F security_frdm_k64f
#define IRQ_VECTOR_TABLE irq_vector_table
#if defined(CONFIG_GDB_INFO) && !defined(CONFIG_SW_ISR_TABLE)
#define GDB_STUB_IRQ_VECTOR_TABLE gdb_stub_irq_vector_table
#endif /* CONFIG_GDB_INFO && !CONFIG_SW_ISR_TABLE */
#elif defined(CONFIG_ARC)
#define IRQ_VECTOR_TABLE irq_vector_table