diff --git a/drivers/counter/CMakeLists.txt b/drivers/counter/CMakeLists.txt index ccddda7443c..450be8e976c 100644 --- a/drivers/counter/CMakeLists.txt +++ b/drivers/counter/CMakeLists.txt @@ -54,3 +54,4 @@ zephyr_library_sources_ifdef(CONFIG_COUNTER_RTC_MAX32 counter_max32_rt zephyr_library_sources_ifdef(CONFIG_COUNTER_NXP_MRT counter_nxp_mrt.c) zephyr_library_sources_ifdef(CONFIG_COUNTER_RA_AGT counter_renesas_ra_agt.c) zephyr_library_sources_ifdef(CONFIG_COUNTER_RENESAS_RZ_GTM counter_renesas_rz_gtm.c) +zephyr_library_sources_ifdef(CONFIG_COUNTER_REALTEK_RTS5912_SLWTMR counter_realtek_rts5912_slwtmr.c) diff --git a/drivers/counter/Kconfig b/drivers/counter/Kconfig index a28344c0520..999b73ae06e 100644 --- a/drivers/counter/Kconfig +++ b/drivers/counter/Kconfig @@ -106,4 +106,6 @@ source "drivers/counter/Kconfig.renesas_ra" source "drivers/counter/Kconfig.renesas_rz" +source "drivers/counter/Kconfig.rts5912_slwtmr" + endif # COUNTER diff --git a/drivers/counter/Kconfig.rts5912_slwtmr b/drivers/counter/Kconfig.rts5912_slwtmr new file mode 100644 index 00000000000..47b6ab72f1b --- /dev/null +++ b/drivers/counter/Kconfig.rts5912_slwtmr @@ -0,0 +1,12 @@ +# Realtek counter configuration options + +# Copyright (c) 2025 Realtek Corporation +# SPDX-License-Identifier: Apache-2.0 + +config COUNTER_REALTEK_RTS5912_SLWTMR + bool "Realtek rts5912 series slow timer counter driver" + default y + depends on DT_HAS_REALTEK_RTS5912_SLWTIMER_ENABLED + help + Enable counter driver for Realtek RTS5912 MCU series. Such driver + will expose the slow timer devices present on the MCU. diff --git a/drivers/counter/counter_realtek_rts5912_slwtmr.c b/drivers/counter/counter_realtek_rts5912_slwtmr.c new file mode 100644 index 00000000000..d9741779f69 --- /dev/null +++ b/drivers/counter/counter_realtek_rts5912_slwtmr.c @@ -0,0 +1,339 @@ +/* + * Copyright (c) 2025 Realtek Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#define DT_DRV_COMPAT realtek_rts5912_slwtimer + +/** + * @file + * @brief Realtek RTS5912 Counter driver + * + * This is the driver for the 32-bit counters on the Realtek SoCs. + * + * Notes: + * - The counters are running in down counting mode. + * - Interrupts are triggered (if enabled) when the counter + * reaches zero. + * - These are not free running counters where there are separate + * compare values for interrupts. When setting single shot alarms, + * the counter values are changed so that interrupts are triggered + * when the counters reach zero. + */ + +#include +#include +#include +#include +#include +#include "reg/reg_slwtmr.h" +LOG_MODULE_REGISTER(counter_realtek_rts5912_slwtmr, CONFIG_COUNTER_LOG_LEVEL); + +struct counter_rts5912_config { + struct counter_config_info info; + void (*config_func)(void); + volatile struct slwtmr_type *base_address; + uint16_t prescaler; +#if (CONFIG_CLOCK_CONTROL) + const struct device *clk_dev; + struct rts5912_sccon_subsys sccon_cfg; +#endif +}; + +struct counter_rts5912_data { + counter_alarm_callback_t alarm_cb; + counter_top_callback_t top_cb; + void *user_data; +}; + +static int counter_rts5912_start(const struct device *dev) +{ + const struct counter_rts5912_config *config = dev->config; + volatile struct slwtmr_type *counter = config->base_address; + + if (counter->ctrl & SLWTMR_CTRL_EN) { + return -EALREADY; + } + + counter->ctrl |= SLWTMR_CTRL_EN; + + LOG_DBG("%p Counter started", dev); + + return 0; +} + +static int counter_rts5912_stop(const struct device *dev) +{ + const struct counter_rts5912_config *config = dev->config; + volatile struct slwtmr_type *counter = config->base_address; + + if (!(counter->ctrl & SLWTMR_CTRL_EN)) { + /* Already stopped, nothing to do */ + return 0; + } + + /* disable timer and disable interrupt. */ + counter->ctrl = 0; + counter->ldcnt = counter->cnt; + + /* w1c interrupt pending status */ + counter->insts |= SLWTMR_INTSTS_STS; + + LOG_DBG("%p Counter stopped", dev); + + return 0; +} + +static int counter_rts5912_get_value(const struct device *dev, uint32_t *ticks) +{ + const struct counter_rts5912_config *config = dev->config; + volatile struct slwtmr_type *counter = config->base_address; + + *ticks = counter->cnt; + return 0; +} + +static int counter_rts5912_set_alarm(const struct device *dev, uint8_t chan_id, + const struct counter_alarm_cfg *alarm_cfg) +{ + const struct counter_rts5912_config *config = dev->config; + volatile struct slwtmr_type *counter = config->base_address; + struct counter_rts5912_data *data = dev->data; + + if (chan_id != 0) { + LOG_ERR("Invalid channel id %u", chan_id); + return -ENOTSUP; + } + + /* Interrupts are only triggered when the counter reaches 0. + * So only relative alarms are supported. + */ + if (alarm_cfg->flags & COUNTER_ALARM_CFG_ABSOLUTE) { + return -ENOTSUP; + } + + if (data->alarm_cb != NULL) { + return -EBUSY; + } + + if (!alarm_cfg->callback) { + return -EINVAL; + } + + if (alarm_cfg->ticks > config->info.max_top_value) { + return -EINVAL; + } + /* disable timer and disable interrupt */ + counter->ctrl = 0; + + counter->ldcnt = alarm_cfg->ticks; + + data->alarm_cb = alarm_cfg->callback; + data->user_data = alarm_cfg->user_data; + /* w1c interrupt status */ + counter->insts |= SLWTMR_INTSTS_STS; + /* enable interrupt */ + counter->ctrl |= SLWTMR_CTRL_INTEN_EN; + + LOG_DBG("%p Counter alarm set to %u ticks", dev, alarm_cfg->ticks); + /* enable timer and re-load PRcnt to cnt */ + counter->ctrl |= SLWTMR_CTRL_EN; + + return 0; +} + +static int counter_rts5912_cancel_alarm(const struct device *dev, uint8_t chan_id) +{ + const struct counter_rts5912_config *config = dev->config; + volatile struct slwtmr_type *counter = config->base_address; + struct counter_rts5912_data *data = dev->data; + + if (chan_id != 0) { + LOG_ERR("Invalid channel id %u", chan_id); + return -ENOTSUP; + } + + counter->ctrl = 0; + + data->alarm_cb = NULL; + data->user_data = NULL; + + LOG_DBG("%p Counter alarm canceled", dev); + + return 0; +} + +static uint32_t counter_rts5912_get_pending_int(const struct device *dev) +{ + const struct counter_rts5912_config *config = dev->config; + volatile struct slwtmr_type *counter = config->base_address; + + return counter->insts; +} + +static uint32_t counter_rts5912_get_top_value(const struct device *dev) +{ + const struct counter_rts5912_config *config = dev->config; + volatile struct slwtmr_type *counter = config->base_address; + + return counter->ldcnt; +} + +static int counter_rts5912_set_top_value(const struct device *dev, + const struct counter_top_cfg *cfg) +{ + const struct counter_rts5912_config *config = dev->config; + volatile struct slwtmr_type *counter = config->base_address; + struct counter_rts5912_data *data = dev->data; + int ret = 0; + + if (data->alarm_cb) { + return -EBUSY; + } + + if (cfg->ticks > config->info.max_top_value) { + return -EINVAL; + } + + counter->ctrl = 0; + + counter->ldcnt = cfg->ticks; + + data->top_cb = cfg->callback; + data->user_data = cfg->user_data; + + if (data->top_cb) { + /* w1c interrupt status */ + counter->insts |= SLWTMR_INTSTS_STS; + /* enable interrupt */ + counter->ctrl |= SLWTMR_CTRL_INTEN_EN; + /* enable periodic alarm mode */ + counter->ctrl |= SLWTMR_CTRL_MDSELS_PERIOD; + } else { + /* disable interrupt */ + counter->ctrl &= ~SLWTMR_CTRL_INTEN_EN; + } + + LOG_DBG("%p Counter top value was set to %u", dev, cfg->ticks); + + counter->ctrl |= SLWTMR_CTRL_EN; + return ret; +} + +static void counter_rts5912_isr(const struct device *dev) +{ + const struct counter_rts5912_config *config = dev->config; + volatile struct slwtmr_type *counter = config->base_address; + struct counter_rts5912_data *data = dev->data; + counter_alarm_callback_t alarm_cb; + void *user_data; + /* disable timer */ + counter->ctrl &= ~SLWTMR_CTRL_EN; + /* disable interrupt */ + counter->ctrl &= ~SLWTMR_CTRL_INTEN_EN; + /* clear interrupt pending status */ + counter->insts |= SLWTMR_INTSTS_STS; + + LOG_DBG("%p Counter ISR", dev); + + if (data->alarm_cb) { + /* Alarm is one-shot, so disable callback */ + alarm_cb = data->alarm_cb; + data->alarm_cb = NULL; + user_data = data->user_data; + + alarm_cb(dev, 0, counter->cnt, user_data); + } else if (data->top_cb) { + data->top_cb(dev, data->user_data); + /* periodic alarm mode, enable interrupt */ + counter->ctrl |= SLWTMR_CTRL_INTEN_EN; + /* enable timer again */ + counter->ctrl |= SLWTMR_CTRL_EN; + } +} + +static uint32_t counter_rts5912_get_freq(const struct device *dev) +{ + const struct counter_rts5912_config *config = dev->config; + + return config->info.freq; +} + +static DEVICE_API(counter, counter_rts5912_api) = { + .start = counter_rts5912_start, + .stop = counter_rts5912_stop, + .get_value = counter_rts5912_get_value, + .set_alarm = counter_rts5912_set_alarm, + .cancel_alarm = counter_rts5912_cancel_alarm, + .set_top_value = counter_rts5912_set_top_value, + .get_pending_int = counter_rts5912_get_pending_int, + .get_top_value = counter_rts5912_get_top_value, + .get_freq = counter_rts5912_get_freq, +}; + +static int counter_rts5912_init(const struct device *dev) +{ + const struct counter_rts5912_config *config = dev->config; + volatile struct slwtmr_type *counter = config->base_address; + int ret; + +#if defined(CONFIG_CLOCK_CONTROL) + if (!device_is_ready(config->clk_dev)) { + return -ENODEV; + } + ret = clock_control_on(config->clk_dev, (clock_control_subsys_t)&config->sccon_cfg); + if (ret != 0) { + return ret; + } +#endif + + counter_rts5912_stop(dev); + /* Set preload and actually pre-load the counter */ + counter->ldcnt = config->info.max_top_value; + counter->cnt = config->info.max_top_value; + + config->config_func(); + LOG_DBG("Init Complete"); + return 0; +} + +#define DEV_CONFIG_CLK_DEV_INIT(n) \ + .clk_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)), \ + .sccon_cfg = { \ + .clk_grp = DT_INST_CLOCKS_CELL_BY_NAME(n, slwtmr, clk_grp), \ + .clk_idx = DT_INST_CLOCKS_CELL_BY_NAME(n, slwtmr, clk_idx), \ + } + +#define COUNTER_RTS5912_INIT(inst) \ + static void counter_rts5912_irq_config_##inst(void); \ + \ + static struct counter_rts5912_data counter_rts5912_dev_data_##inst; \ + \ + static struct counter_rts5912_config counter_rts5912_dev_config_##inst = { \ + .info = \ + { \ + .max_top_value = DT_INST_PROP(inst, max_value), \ + .freq = DT_INST_PROP(inst, clock_frequency) / \ + (1 << DT_INST_PROP(inst, prescaler)), \ + .flags = 0, \ + .channels = 1, \ + }, \ + \ + .config_func = counter_rts5912_irq_config_##inst, \ + .base_address = (struct slwtmr_type *)DT_INST_REG_ADDR(inst), \ + .prescaler = DT_INST_PROP(inst, prescaler), \ + DEV_CONFIG_CLK_DEV_INIT(inst)}; \ + \ + DEVICE_DT_INST_DEFINE(inst, counter_rts5912_init, NULL, &counter_rts5912_dev_data_##inst, \ + &counter_rts5912_dev_config_##inst, POST_KERNEL, \ + CONFIG_COUNTER_INIT_PRIORITY, &counter_rts5912_api); \ + \ + static void counter_rts5912_irq_config_##inst(void) \ + { \ + IRQ_CONNECT(DT_INST_IRQN(inst), DT_INST_IRQ(inst, priority), counter_rts5912_isr, \ + DEVICE_DT_INST_GET(inst), 0); \ + irq_enable(DT_INST_IRQN(inst)); \ + } + +DT_INST_FOREACH_STATUS_OKAY(COUNTER_RTS5912_INIT) diff --git a/dts/bindings/timer/realtek,rts5912-slwtimer.yaml b/dts/bindings/counter/realtek,rts5912-slwtimer.yaml similarity index 84% rename from dts/bindings/timer/realtek,rts5912-slwtimer.yaml rename to dts/bindings/counter/realtek,rts5912-slwtimer.yaml index aa8a3f40510..b27eb33ba14 100644 --- a/dts/bindings/timer/realtek,rts5912-slwtimer.yaml +++ b/dts/bindings/counter/realtek,rts5912-slwtimer.yaml @@ -7,7 +7,7 @@ description: Realtek RTS5912 32-bit slow timer compatible: "realtek,rts5912-slwtimer" -include: rtc.yaml +include: base.yaml properties: reg: @@ -22,7 +22,9 @@ properties: description: Maximum counter value the instance can handle clock-frequency: + type: int required: true + description: Clock frequency information for timer operation prescaler: type: int diff --git a/soc/realtek/ec/rts5912/reg/reg_slwtmr.h b/soc/realtek/ec/rts5912/reg/reg_slwtmr.h new file mode 100644 index 00000000000..be37eafc0d5 --- /dev/null +++ b/soc/realtek/ec/rts5912/reg/reg_slwtmr.h @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2025 Realtek, SIBG-SD7 + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ZEPHYR_SOC_REALTEK_RTS5912_REG_SLWTMR_H +#define ZEPHYR_SOC_REALTEK_RTS5912_REG_SLWTMR_H + +/** + * @brief SLOW Timer Controller (SLWTMR) + */ + +struct slwtmr_type { + uint32_t ldcnt; + uint32_t cnt; + uint32_t ctrl; + uint32_t insts; +}; + +/* CTRL */ +#define SLWTMR_CTRL_EN BIT(0) + +#define SLWTMR_CTRL_MDSELS_ONESHOT 0 +#define SLWTMR_CTRL_MDSELS_PERIOD BIT(1) + +#define SLWTMR_CTRL_INTEN_EN BIT(2) +/* INTSTS */ +#define SLWTMR_INTSTS_STS BIT(0) + +#endif /* ZEPHYR_SOC_REALTEK_RTS5912_REG_SLWTMR_H */