serial/stm32: add driver for STM32 UART
Add driver for U(S)ART ports on STM32 MCUs. The driver implements basic RX/TX functionality. Data transmission is implemented using polling. The driver configures the port to use 8bit data transmission, 1 stop bit, no parity control. The driver exposes a public uart driver API and registers a single UART device 'UART_0'. The device binds to USART1 peripheral and performs required pinmux and clock control configuration. The device can be initialized at the PRIMARY level, with default device priority. The driver has been verified to work with a sample Hello World application on a STM32F103 series MCU. Change-Id: Iae103fcd8d2fb0a6c173cf141a68e17791255aab Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
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Maciek Borzecki
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5 changed files with 510 additions and 0 deletions
239
drivers/serial/uart_stm32.c
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239
drivers/serial/uart_stm32.c
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/*
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* Copyright (c) 2016 Open-RnD Sp. z o.o.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @brief Driver for UART port on STM32F10x family processor.
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*
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* Based on reference manual:
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* STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and STM32F107xx
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* advanced ARM ® -based 32-bit MCUs
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*
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* Chapter 27: Universal synchronous asynchronous receiver
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* transmitter (USART)
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*/
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#include <nanokernel.h>
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#include <arch/cpu.h>
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#include <misc/__assert.h>
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#include <board.h>
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#include <init.h>
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#include <uart.h>
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#include <clock_control.h>
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#include <sections.h>
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#include <clock_control/stm32_clock_control.h>
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#include "uart_stm32.h"
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/* convenience defines */
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#define DEV_CFG(dev) \
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((struct uart_stm32_config * const)(dev)->config->config_info)
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#define DEV_DATA(dev) \
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((struct uart_stm32_data * const)(dev)->driver_data)
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#define UART_STRUCT(dev) \
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((volatile struct uart_stm32 *)(DEV_CFG(dev))->uconf.base)
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/**
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* @brief set baud rate
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*
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*/
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static void set_baud_rate(struct device *dev, uint32_t rate)
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{
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volatile struct uart_stm32 *uart = UART_STRUCT(dev);
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struct uart_stm32_data *data = DEV_DATA(dev);
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struct uart_stm32_config *cfg = DEV_CFG(dev);
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uint32_t div, mantissa, fraction;
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uint32_t clock;
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/* Baud rate is controlled through BRR register. The values
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* written into the register depend on the clock driving the
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* peripheral. Ask clock_control for the current clock rate of
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* our peripheral.
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*/
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clock_control_get_rate(data->clock, cfg->clock_subsys, &clock);
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/* baud rate calculation:
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*
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* baud rate = f_clk / (16 * usartdiv)
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*
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* Example (STM32F10x, USART1, PCLK2 @ 36MHz, 9600bps):
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*
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* f_clk == PCLK2,
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* usartdiv = 234.375,
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* mantissa = 234,
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* fracion = 6 (0.375 * 16)
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*/
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div = clock / rate;
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mantissa = div >> 4;
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fraction = div & 0xf;
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uart->brr.bit.mantissa = mantissa;
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uart->brr.bit.fraction = fraction;
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}
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static int uart_stm32_poll_in(struct device *dev, unsigned char *c)
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{
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volatile struct uart_stm32 *uart = UART_STRUCT(dev);
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/* check if RXNE is set */
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if (!uart->sr.bit.rxne) {
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return -1;
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}
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/* read character */
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*c = (unsigned char)uart->dr.bit.dr;
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return 0;
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}
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static unsigned char uart_stm32_poll_out(struct device *dev,
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unsigned char c)
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{
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volatile struct uart_stm32 *uart = UART_STRUCT(dev);
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/* wait for TXE to be set */
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while (!uart->sr.bit.txe) {
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}
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uart->dr.bit.dr = c;
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return c;
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}
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static inline void __uart_stm32_get_clock(struct device *dev)
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{
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struct uart_stm32_data *ddata = dev->driver_data;
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struct device *clk =
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device_get_binding(STM32_CLOCK_CONTROL_NAME);
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__ASSERT_NO_MSG(clk);
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ddata->clock = clk;
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}
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static struct uart_driver_api uart_stm32_driver_api = {
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.poll_in = uart_stm32_poll_in,
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.poll_out = uart_stm32_poll_out,
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};
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/**
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* @brief Initialize UART channel
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*
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* This routine is called to reset the chip in a quiescent state.
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* It is assumed that this function is called only once per UART.
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*
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* @param dev UART device struct
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*
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* @return 0
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*/
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static int uart_stm32_init(struct device *dev)
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{
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volatile struct uart_stm32 *uart = UART_STRUCT(dev);
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struct uart_stm32_data *data = DEV_DATA(dev);
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struct uart_stm32_config *cfg = DEV_CFG(dev);
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__uart_stm32_get_clock(dev);
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/* enable clock */
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clock_control_on(data->clock, cfg->clock_subsys);
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/* FIXME: hardcoded, clear stop bits */
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uart->cr2.bit.stop = 0;
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uart->cr1.val = 0;
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/* FIXME: hardcoded, 8n1 */
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uart->cr1.bit.m = 0;
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uart->cr1.bit.pce = 0;
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/* FIXME: hardcoded, disable hardware flow control */
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uart->cr3.bit.ctse = 0;
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uart->cr3.bit.rtse = 0;
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set_baud_rate(dev, data->baud_rate);
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/* enable TX/RX */
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uart->cr1.bit.te = 1;
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uart->cr1.bit.re = 1;
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/* enable */
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uart->cr1.bit.ue = 1;
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dev->driver_api = &uart_stm32_driver_api;
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return 0;
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}
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#ifdef CONFIG_UART_STM32_PORT_0
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static struct uart_stm32_config uart_stm32_dev_cfg_0 = {
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.uconf = {
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.base = (uint8_t *)USART1_ADDR,
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},
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#ifdef CONFIG_SOC_STM32F1X
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.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART1),
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#endif /* CONFIG_SOC_STM32F1X */
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};
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static struct uart_stm32_data uart_stm32_dev_data_0 = {
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.baud_rate = CONFIG_UART_STM32_PORT_0_BAUD_RATE,
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};
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DEVICE_INIT(uart_stm32_0, CONFIG_UART_STM32_PORT_0_NAME, &uart_stm32_init,
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&uart_stm32_dev_data_0, &uart_stm32_dev_cfg_0,
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PRIMARY, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
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#endif /* CONFIG_UART_STM32_PORT_0 */
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#ifdef CONFIG_UART_STM32_PORT_1
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static struct uart_stm32_config uart_stm32_dev_cfg_1 = {
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.uconf = {
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.base = (uint8_t *)USART2_ADDR,
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},
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#ifdef CONFIG_SOC_STM32F1X
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.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART2),
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#endif /* CONFIG_SOC_STM32F1X */
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};
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static struct uart_stm32_data uart_stm32_dev_data_1 = {
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.baud_rate = CONFIG_UART_STM32_PORT_1_BAUD_RATE,
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};
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DEVICE_INIT(uart_stm32_1, CONFIG_UART_STM32_PORT_1_NAME, &uart_stm32_init,
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&uart_stm32_dev_data_1, &uart_stm32_dev_cfg_1,
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PRIMARY, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
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#endif /* CONFIG_UART_STM32_PORT_1 */
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#ifdef CONFIG_UART_STM32_PORT_2
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static struct uart_stm32_config uart_stm32_dev_cfg_2 = {
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.uconf = {
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.base = (uint8_t *)USART3_ADDR,
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},
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#ifdef CONFIG_SOC_STM32F1X
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.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART3),
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#endif /* CONFIG_SOC_STM32F1X */
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};
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static struct uart_stm32_data uart_stm32_dev_data_2 = {
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.baud_rate = CONFIG_UART_STM32_PORT_2_BAUD_RATE,
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};
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DEVICE_INIT(uart_stm32_2, CONFIG_UART_STM32_PORT_2_NAME, &uart_stm32_init,
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&uart_stm32_dev_data_2, &uart_stm32_dev_cfg_2,
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PRIMARY, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
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#endif /* CONFIG_UART_STM32_PORT_2 */
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