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drivers: sifive: fix pending clear for falling edge

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The wrong register was used clearing pending interrupts on falling
edge cases.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
This commit is contained in:
Peter A. Bigot 2020-03-28 18:34:24 -05:00 • committed by Kumar Gala
commit 5a0039edb7
1 changed files with 1 additions and 1 deletions
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2
drivers/gpio/gpio_sifive.c
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@ -282,7 +282,7 @@ static int gpio_sifive_pin_interrupt_configure(struct device *dev,
gpio->rise_ie |= BIT(pin); gpio->rise_ie |= BIT(pin);
} }
if ((trig & GPIO_INT_LOW_0) != 0) { if ((trig & GPIO_INT_LOW_0) != 0) {
gpio->rise_ip = BIT(pin); gpio->fall_ip = BIT(pin);
gpio->fall_ie |= BIT(pin); gpio->fall_ie |= BIT(pin);
} }
irq_enable(gpio_sifive_pin_irq(cfg->gpio_irq_base, pin)); irq_enable(gpio_sifive_pin_irq(cfg->gpio_irq_base, pin));