From 5951e45580c198c11e8fac59544195123a46e3ad Mon Sep 17 00:00:00 2001 From: Vincenzo Frascino Date: Fri, 10 Mar 2017 01:51:22 +0000 Subject: [PATCH] soc: arm: stm32f4: Add Initial MPU Support This patch adds initial MPU support to STM32F401XE. The boot configuration prevents the following security issues: * Prevent to read at an address that is reserved in the memory map. * Prevent to write into the boot Flash/ROM. * Prevent the application to access to the BootROM. * Prevent from running code located in SRAM. Change-Id: I4dc0669009bd5c0a829a69f8ff417c787b7043ed Signed-off-by: Vincenzo Frascino --- arch/arm/soc/st_stm32/stm32f4/Kconfig.series | 1 + arch/arm/soc/st_stm32/stm32f4/Kconfig.soc | 20 ++++++ arch/arm/soc/st_stm32/stm32f4/Makefile | 1 + .../soc/st_stm32/stm32f4/arm_mpu_mem_cfg.h | 70 +++++++++++++++++++ .../soc/st_stm32/stm32f4/arm_mpu_regions.c | 53 ++++++++++++++ 5 files changed, 145 insertions(+) create mode 100644 arch/arm/soc/st_stm32/stm32f4/arm_mpu_mem_cfg.h create mode 100644 arch/arm/soc/st_stm32/stm32f4/arm_mpu_regions.c diff --git a/arch/arm/soc/st_stm32/stm32f4/Kconfig.series b/arch/arm/soc/st_stm32/stm32f4/Kconfig.series index fe4dae69b53..62e85e04338 100644 --- a/arch/arm/soc/st_stm32/stm32f4/Kconfig.series +++ b/arch/arm/soc/st_stm32/stm32f4/Kconfig.series @@ -13,6 +13,7 @@ config SOC_SERIES_STM32F4X select SOC_FAMILY_STM32 select SYS_POWER_LOW_POWER_STATE_SUPPORTED select HAS_STM32CUBE + select CPU_HAS_MPU select CPU_HAS_SYSTICK help Enable support for STM32F4 MCU series diff --git a/arch/arm/soc/st_stm32/stm32f4/Kconfig.soc b/arch/arm/soc/st_stm32/stm32f4/Kconfig.soc index d2b5bd29a09..7cc99c4d396 100644 --- a/arch/arm/soc/st_stm32/stm32f4/Kconfig.soc +++ b/arch/arm/soc/st_stm32/stm32f4/Kconfig.soc @@ -22,3 +22,23 @@ config SOC_STM32F429XX bool "STM32F429XX" endchoice + +config STM32_ARM_MPU_ENABLE + bool "Enable MPU" + depends on CPU_HAS_MPU + select ARM_MPU + default n + help + Enable MPU + +choice +prompt "Configure Bootloader Options" +depends on MPU_ENABLE + +config BL_BOOTLOADER + bool "Build the Bootloader" + +config BL_APPLICATION + bool "Build an Application" + +endchoice diff --git a/arch/arm/soc/st_stm32/stm32f4/Makefile b/arch/arm/soc/st_stm32/stm32f4/Makefile index 6ae6e190c48..218b68294b5 100644 --- a/arch/arm/soc/st_stm32/stm32f4/Makefile +++ b/arch/arm/soc/st_stm32/stm32f4/Makefile @@ -2,6 +2,7 @@ obj-y += soc.o obj-$(CONFIG_GPIO) += soc_gpio.o obj-$(CONFIG_PINMUX) += soc_pinmux.o +obj-$(CONFIG_STM32_ARM_MPU_ENABLE) += arm_mpu_regions.o zephyr: $(KERNEL_HEX_NAME) all: $(KERNEL_HEX_NAME) diff --git a/arch/arm/soc/st_stm32/stm32f4/arm_mpu_mem_cfg.h b/arch/arm/soc/st_stm32/stm32f4/arm_mpu_mem_cfg.h new file mode 100644 index 00000000000..3173f7ad591 --- /dev/null +++ b/arch/arm/soc/st_stm32/stm32f4/arm_mpu_mem_cfg.h @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2017 Linaro Limited. + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef _ARM_MPU_MEM_CFG_H_ +#define _ARM_MPU_MEM_CFG_H_ + +#include +#include + +/* Flash Region Definitions */ +#if CONFIG_FLASH_SIZE == 64 +#define REGION_FLASH_SIZE REGION_64K +#elif CONFIG_FLASH_SIZE == 128 +#define REGION_FLASH_SIZE REGION_128K +#elif CONFIG_FLASH_SIZE == 256 +#define REGION_FLASH_SIZE REGION_256K +#elif CONFIG_FLASH_SIZE == 512 +#define REGION_FLASH_SIZE REGION_512K +#elif CONFIG_FLASH_SIZE == 1024 +#define REGION_FLASH_SIZE REGION_1024K +#elif CONFIG_FLASH_SIZE == 2048 +#define REGION_FLASH_SIZE REGION_2048K +#else +#error "Unsupported configuration" +#endif + +/* SRAM Region Definitions */ +#if CONFIG_SRAM_SIZE == 12 +#define REGION_SRAM_0_SIZE REGION_8K +#define REGION_SRAM_1_START 0x2000 +#define REGION_SRAM_1_SIZE REGION_4K +#elif CONFIG_SRAM_SIZE == 20 +#define REGION_SRAM_0_SIZE REGION_16K +#define REGION_SRAM_1_START 0x4000 +#define REGION_SRAM_1_SIZE REGION_4K +#elif CONFIG_SRAM_SIZE == 32 +#define REGION_SRAM_0_SIZE REGION_16K +#define REGION_SRAM_1_START 0x4000 +#define REGION_SRAM_1_SIZE REGION_16K +#elif CONFIG_SRAM_SIZE == 40 +#define REGION_SRAM_0_SIZE REGION_32K +#define REGION_SRAM_1_START 0x8000 +#define REGION_SRAM_1_SIZE REGION_8K +#elif CONFIG_SRAM_SIZE == 64 +#define REGION_SRAM_0_SIZE REGION_32K +#define REGION_SRAM_1_START 0x8000 +#define REGION_SRAM_1_SIZE REGION_32K +#elif CONFIG_SRAM_SIZE == 96 +#define REGION_SRAM_0_SIZE REGION_64K +#define REGION_SRAM_1_START 0x10000 +#define REGION_SRAM_1_SIZE REGION_32K +#elif CONFIG_SRAM_SIZE == 128 +#define REGION_SRAM_0_SIZE REGION_64K +#define REGION_SRAM_1_START 0x10000 +#define REGION_SRAM_1_SIZE REGION_64K +#elif CONFIG_SRAM_SIZE == 192 +#define REGION_SRAM_0_SIZE REGION_128K +#define REGION_SRAM_1_START 0x20000 +#define REGION_SRAM_1_SIZE REGION_64K +#elif CONFIG_SRAM_SIZE == 256 +#define REGION_SRAM_0_SIZE REGION_128K +#define REGION_SRAM_1_START 0x20000 +#define REGION_SRAM_1_SIZE REGION_128K +#else +#error "Unsupported configuration" +#endif + +#endif /* _ARM_MPU_MEM_CFG_H_ */ diff --git a/arch/arm/soc/st_stm32/stm32f4/arm_mpu_regions.c b/arch/arm/soc/st_stm32/stm32f4/arm_mpu_regions.c new file mode 100644 index 00000000000..26571274f92 --- /dev/null +++ b/arch/arm/soc/st_stm32/stm32f4/arm_mpu_regions.c @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2017 Linaro Limited. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +#include "arm_mpu_mem_cfg.h" + +/* SoC Private Peripheral Bus */ +#define PPB_BASE 0xE0000000 + +static struct arm_mpu_region mpu_regions[] = { + /* Region 0 */ + MPU_REGION_ENTRY("FLASH_0", + CONFIG_FLASH_BASE_ADDRESS, + REGION_FLASH_ATTR(REGION_FLASH_SIZE)), + /* Region 1 */ + MPU_REGION_ENTRY("RAM_0", + CONFIG_SRAM_BASE_ADDRESS, + REGION_RAM_ATTR(REGION_SRAM_0_SIZE)), + /* Region 2 */ + MPU_REGION_ENTRY("RAM_1", + (CONFIG_SRAM_BASE_ADDRESS + REGION_SRAM_1_START), + REGION_RAM_ATTR(REGION_SRAM_1_SIZE)), + /* Region 3 */ + MPU_REGION_ENTRY("PERIPHERAL_0", + APB1PERIPH_BASE, + REGION_IO_ATTR(REGION_512M)), + /* Region 4 */ + MPU_REGION_ENTRY("PPB_0", + PPB_BASE, + REGION_PPB_ATTR(REGION_256M)), +#if defined(CONFIG_BL_APPLICATION) + /* Region 5 */ + /* + * The application booting from a bootloader has no access to the + * bootloader region. This behavior can be changed at runtime by + * the bootloader. + */ + MPU_REGION_ENTRY("BOOTLOADER_0", + CONFIG_FLASH_BASE_ADDRESS, + (NORMAL_OUTER_INNER_NON_CACHEABLE_NON_SHAREABLE | + REGION_32K | P_NA_U_NA)), +#endif +}; + +struct arm_mpu_config mpu_config = { + .num_regions = ARRAY_SIZE(mpu_regions), + .mpu_regions = mpu_regions, +};