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x86: add MSR defintions needed for syscalls

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Define MSR register addresses for various MSRs related to
SYSCALL/SYSRET. We also add MSRs for FS/GS base addresses
(for GS, both kernel and user mode) to support SWAPGS.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit is contained in:
Andrew Boie 2019-11-12 15:48:40 -08:00 • committed by Anas Nashif
commit 592ecf07c7
1 changed files with 17 additions and 0 deletions
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17
include/arch/x86/msr.h
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@ -25,9 +25,26 @@
#define X86_X2APIC_BASE_MSR 0x00000800 /* .. thru 0x00000BFF */
#define X86_EFER_MSR 0xC0000080
#define X86_EFER_MSR_SCE BIT(0)
#define X86_EFER_MSR_LME BIT(8)
#define X86_EFER_MSR_NXE BIT(11)
/* STAR 31:0 Unused in long mode
* 47:32 Kernel CS (SS = CS+8)
* 63:48 User CS (SS = CS+8)
*/
#define X86_STAR_MSR 0xC0000081
/* Location for system call entry point */
#define X86_LSTAR_MSR 0xC0000082
/* Low 32 bits in this MSR are the SYSCALL mask applied to EFLAGS */
#define X86_FMASK_MSR 0xC0000084
#define X86_FS_BASE 0xC0000100
#define X86_GS_BASE 0xC0000101
#define X86_KERNEL_GS_BASE 0xC0000102
#ifndef _ASMLANGUAGE
#ifdef __cplusplus
extern "C" {