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arch: treewide: Remove unnessecary flash size/address defconfig when !XIP

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FLASH_SIZE=0 and FLASH_BASE_ADDRESS=0 are now the default values
when XIP=n

Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
This commit is contained in:
Grant Ramsay 2024-06-11 20:19:08 +12:00 • committed by Anas Nashif
commit 5914c86931
15 changed files with 0 additions and 184 deletions
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15
boards/96boards/meerkat96/Kconfig.defconfig
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@ -1,15 +0,0 @@
# 96Boards Meerkat96 board
# Copyright (c) 2019, Linaro Ltd.
# SPDX-License-Identifier: Apache-2.0
if BOARD_96B_MEERKAT96
if !XIP
config FLASH_SIZE
default 0
config FLASH_BASE_ADDRESS
default 0
endif
endif # BOARD_96B_MEERKAT96

7
boards/element14/warp7/Kconfig.defconfig
View file

@ -13,11 +13,4 @@ config FXAS21002_DRDY_INT1
default y default y
depends on FXAS21002_TRIGGER depends on FXAS21002_TRIGGER
if !XIP
config FLASH_SIZE
default 0
config FLASH_BASE_ADDRESS
default 0
endif
endif # BOARD_WARP7 endif # BOARD_WARP7

15
boards/nxp/imx8mm_evk/Kconfig.defconfig
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@ -1,15 +0,0 @@
# MIMX8MM EVK board defconfig
# Copyright (c) 2020, Manivannan Sadhasivam <mani@kernel.org>
# SPDX-License-Identifier: Apache-2.0
if BOARD_IMX8MM_EVK_MIMX8MM6_M4
if !XIP
config FLASH_SIZE
default 0
config FLASH_BASE_ADDRESS
default 0
endif
endif # BOARD_IMX8MM_EVK_MIMX8MM6_M4

15
boards/nxp/imx8mp_evk/Kconfig.defconfig
View file

@ -1,15 +0,0 @@
# MIMX8MP EVK board defconfig
# Copyright (c) 2021, Laird Connectivity
# SPDX-License-Identifier: Apache-2.0
if BOARD_IMX8MP_EVK_MIMX8ML8_M7 || BOARD_IMX8MP_EVK_MIMX8ML8_M7_DDR
if !XIP
config FLASH_SIZE
default 0
config FLASH_BASE_ADDRESS
default 0
endif
endif # BOARD_IMX8MP_EVK_MIMX8ML8_M7 || BOARD_IMX8MP_EVK_MIMX8ML8_M7_DDR

16
boards/nxp/imx8mq_evk/Kconfig.defconfig
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@ -1,16 +0,0 @@
# MIMX8MQ EVK board defconfig
# Copyright (c) 2021, Kwon Tae-young <tykwon@m2i.co.kr>
# Copyright 2024 NXP
# SPDX-License-Identifier: Apache-2.0
if BOARD_IMX8MQ_EVK
if !XIP
config FLASH_SIZE
default 0
config FLASH_BASE_ADDRESS
default 0
endif
endif # BOARD_IMX8MQ_EVK

15
boards/phytec/mimx8mm_phyboard_polis/Kconfig.defconfig
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@ -1,15 +0,0 @@
# MIMX8MM_PHYBOARD_POLIS board defconfig
#
# Copyright (c) 2022 PHYTEC Messtechnik GmbH
# SPDX-License-Identifier: Apache-2.0
if BOARD_MIMX8MM_PHYBOARD_POLIS
if !XIP
config FLASH_SIZE
default 0
config FLASH_BASE_ADDRESS
default 0
endif
endif # BOARD_MIMX8MM_PHYBOARD_POLIS

15
boards/phytec/mimx8mp_phyboard_pollux/Kconfig.defconfig
View file

@ -1,15 +0,0 @@
# PhyBOARD Pollux (i.MX8MP) defconfig
# Copyright (c) 2022 PHYTEC Messtechnik GmbH
# SPDX-License-Identifier: Apache-2.0
if BOARD_MIMX8MP_PHYBOARD_POLLUX
if !XIP
config FLASH_SIZE
default 0
config FLASH_BASE_ADDRESS
default 0
endif
endif # BOARD_MIMX8MP_PHYBOARD_POLLUX

15
boards/technexion/pico_pi/Kconfig.defconfig
View file

@ -1,15 +0,0 @@
# Pico-Pi iMX7D M4 board
# Copyright (c) 2019, Joris Offouga
# SPDX-License-Identifier: Apache-2.0
if BOARD_PICO_PI
if !XIP
config FLASH_SIZE
default 0
config FLASH_BASE_ADDRESS
default 0
endif
endif # BOARD_PICO_PI

16
boards/toradex/colibri_imx7d/Kconfig.defconfig
View file

@ -1,16 +0,0 @@
# Colibri iMX7D M4 board
# Copyright 2017,2024 NXP
# SPDX-License-Identifier: Apache-2.0
if BOARD_COLIBRI_IMX7D_MCIMX7D_M4
if !XIP
config FLASH_SIZE
default 0
config FLASH_BASE_ADDRESS
default 0
endif
endif # BOARD_COLIBRI_IMX7D_MCIMX7D_M4

15
boards/toradex/verdin_imx8mp/Kconfig.defconfig
View file

@ -1,15 +0,0 @@
# VERDIN_IMX8MP board defconfig
# Copyright (c) 2023 Toradex
# SPDX-License-Identifier: Apache-2.0
if BOARD_VERDIN_IMX8MP
if !XIP
config FLASH_SIZE
default 0
config FLASH_BASE_ADDRESS
default 0
endif
endif # BOARD_VERDIN_IMX8MP

7
soc/nxp/s32/s32k1/Kconfig.defconfig
View file

@ -15,13 +15,6 @@ config NUM_IRQS
config FPU config FPU
default y if CPU_HAS_FPU default y if CPU_HAS_FPU
if !XIP
config FLASH_SIZE
default 0
config FLASH_BASE_ADDRESS
default 0
endif
# The S32K1xx have 8 MPU regions, which is not enough for both HW stack protection # The S32K1xx have 8 MPU regions, which is not enough for both HW stack protection
# and userspace. Only enable HW stack protection if userspace is not enabled. # and userspace. Only enable HW stack protection if userspace is not enabled.
config HW_STACK_PROTECTION config HW_STACK_PROTECTION

7
soc/nxp/s32/s32k3/Kconfig.defconfig
View file

@ -15,13 +15,6 @@ config NUM_IRQS
config FPU config FPU
default y default y
if !XIP
config FLASH_SIZE
default 0
config FLASH_BASE_ADDRESS
default 0
endif
if NET_L2_ETHERNET if NET_L2_ETHERNET
config NET_TCP_CHECKSUM config NET_TCP_CHECKSUM

8
soc/nxp/s32/s32ze/Kconfig.defconfig
View file

@ -18,14 +18,6 @@ config SYS_CLOCK_HW_CYCLES_PER_SEC
config MAIN_STACK_SIZE config MAIN_STACK_SIZE
default 1024 default 1024
if !XIP
config FLASH_SIZE
default 0
config FLASH_BASE_ADDRESS
default 0
endif # !XIP
if NET_L2_ETHERNET if NET_L2_ETHERNET
# NETC drops TCP/UDP packets with invalid checksum # NETC drops TCP/UDP packets with invalid checksum

9
soc/ti/simplelink/cc32xx/Kconfig.defconfig.cc3220sf
View file

@ -16,13 +16,4 @@ config ROM_START_OFFSET
default 0x800 if XIP default 0x800 if XIP
default 0x0 if !XIP default 0x0 if !XIP
if !XIP
config FLASH_SIZE
default 0
config FLASH_BASE_ADDRESS
default 0
endif
endif # SOC_CC3220SF endif # SOC_CC3220SF

9
soc/ti/simplelink/cc32xx/Kconfig.defconfig.cc3235sf
View file

@ -16,13 +16,4 @@ config ROM_START_OFFSET
default 0x800 if XIP default 0x800 if XIP
default 0x0 if !XIP default 0x0 if !XIP
if !XIP
config FLASH_SIZE
default 0
config FLASH_BASE_ADDRESS
default 0
endif
endif # SOC_CC3235SF endif # SOC_CC3235SF