From 58f5720eb43f2f4b291aa939dafaca55f930ad8a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Manuel=20Arg=C3=BCelles?= Date: Tue, 26 Dec 2023 14:51:54 +0700 Subject: [PATCH] dts: arm: nxp: add FlexCAN support for S32K1xx MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit S32K1xx devices have a maximum of 3 FlexCAN peripherals. Each part may define a different maximum number of instances and message buffers, hence the interrupt lines are defined in the part specific dts. Signed-off-by: Manuel Argüelles --- dts/arm/nxp/nxp_s32k146.dtsi | 17 +++++++++++++++++ dts/arm/nxp/nxp_s32k1xx.dtsi | 22 ++++++++++++++++++++++ soc/arm/nxp_s32/s32k1/Kconfig.series | 1 + west.yml | 2 +- 4 files changed, 41 insertions(+), 1 deletion(-) diff --git a/dts/arm/nxp/nxp_s32k146.dtsi b/dts/arm/nxp/nxp_s32k146.dtsi index be62957cae2..bfbb1558349 100644 --- a/dts/arm/nxp/nxp_s32k146.dtsi +++ b/dts/arm/nxp/nxp_s32k146.dtsi @@ -61,3 +61,20 @@ &lpspi2 { clocks = <&clock NXP_S32_LPSPI2_CLK>; }; + +&flexcan0 { + interrupts = <78 0>, <79 0>, <80 0>, <81 0>, <82 0>; + interrupt-names = "warning", "error", "wake-up", "mb-0-15", "mb-16-31"; +}; + +&flexcan1 { + interrupts = <85 0>, <86 0>, <88 0>, <89 0>; + interrupt-names = "warning", "error", "mb-0-15", "mb-16-31"; + clocks = <&clock NXP_S32_FLEXCAN1_CLK>; +}; + +&flexcan2 { + interrupts = <92 0>, <93 0>, <95 0>; + interrupt-names = "warning", "error", "mb-0-15"; + clocks = <&clock NXP_S32_FLEXCAN2_CLK>; +}; diff --git a/dts/arm/nxp/nxp_s32k1xx.dtsi b/dts/arm/nxp/nxp_s32k1xx.dtsi index dc0763a0e9f..a8c07d14028 100644 --- a/dts/arm/nxp/nxp_s32k1xx.dtsi +++ b/dts/arm/nxp/nxp_s32k1xx.dtsi @@ -44,6 +44,28 @@ status = "disabled"; }; + flexcan0: can@40024000 { + compatible = "nxp,flexcan-fd", "nxp,flexcan"; + reg = <0x40024000 0x1000>; + clocks = <&clock NXP_S32_FLEXCAN0_CLK>; + clk-source = <1>; + status = "disabled"; + }; + + flexcan1: can@40025000 { + compatible = "nxp,flexcan-fd", "nxp,flexcan"; + reg = <0x40025000 0x1000>; + clk-source = <1>; + status = "disabled"; + }; + + flexcan2: can@4002b000 { + compatible = "nxp,flexcan-fd", "nxp,flexcan"; + reg = <0x4002b000 0x1000>; + clk-source = <1>; + status = "disabled"; + }; + lpspi0: spi@4002c000 { compatible = "nxp,imx-lpspi"; reg = <0x4002c000 0x1000>; diff --git a/soc/arm/nxp_s32/s32k1/Kconfig.series b/soc/arm/nxp_s32/s32k1/Kconfig.series index df7070e8e75..12d74205412 100644 --- a/soc/arm/nxp_s32/s32k1/Kconfig.series +++ b/soc/arm/nxp_s32/s32k1/Kconfig.series @@ -17,5 +17,6 @@ config SOC_SERIES_S32K1XX select HAS_MCUX_LPI2C select HAS_MCUX_LPSPI select HAS_MCUX_FTM + select HAS_MCUX_FLEXCAN help Enable support for NXP S32K1XX MCU series. diff --git a/west.yml b/west.yml index 692813cc159..be923f8a989 100644 --- a/west.yml +++ b/west.yml @@ -193,7 +193,7 @@ manifest: groups: - hal - name: hal_nxp - revision: 4605f6715c6a55121da8fcbff060e01c4383c1e9 + revision: 12970d629fc900010dab5cf250be70287bf9e443 path: modules/hal/nxp groups: - hal