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interrupt_controller: RV32M1: add intmux driver / DT bindings

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Add a level 2 interrupt controller for the RV32M1 SoC. This uses the
INTMUX peripheral.

As a first customer, convert the timer driver over to using this,
adding nodes for the LPTMR peripherals. This lets users select the
timer instance they want to use, and what intmux channel they want to
route its interrupt to, using DT overlays.

Signed-off-by: Marti Bolivar <marti@foundries.io>
Signed-off-by: Mike Scott <mike@foundries.io>
This commit is contained in:
Marti Bolivar 2018-11-25 02:41:38 -07:00 • committed by Anas Nashif
commit 58d8afb476
14 changed files with 758 additions and 54 deletions
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43
include/dt-bindings/interrupt-controller/openisa-intmux.h Normal file
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/*
* Copyright (c) 2018 Foundries.io Ltd
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_OPENISA_INTMUX_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_OPENISA_INTMUX_H_
/*
* Symbols for intmux channels, for DT readability when using
* INTMUX_LEVEL2_IRQ().
*/
#define INTMUX_CH0 0
#define INTMUX_CH1 1
#define INTMUX_CH2 2
#define INTMUX_CH3 3
#define INTMUX_CH4 4
#define INTMUX_CH5 5
#define INTMUX_CH6 6
#define INTMUX_CH7 7
/*
* Level 1 IRQ offsets for each INTMUX channel.
*/
#define INTMUX_CH0_IRQ 24
#define INTMUX_CH1_IRQ 25
#define INTMUX_CH2_IRQ 26
#define INTMUX_CH3_IRQ 27
#define INTMUX_CH4_IRQ 28
#define INTMUX_CH5_IRQ 29
#define INTMUX_CH6_IRQ 30
#define INTMUX_CH7_IRQ 31
/*
* Multi-level IRQ number for a INTMUX channel/line interrupt.
*
* See gen_isr_tables.py for details.
*/
#define INTMUX_LEVEL2_IRQ(channel, line) \
((((line) + 1) << 8) | ((channel) + INTMUX_CH0_IRQ))
#endif