soc: stm32: Enable cortex-m systick timer by default

Move systick activation in soc/ as a Kconfig.defconfig file and
remove activation in boards _defconfig files.
This will allow to deactivate it in a more flexible way
with upcoming LPTIMER as tick source when power management
features are enabled.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2019-10-10 13:53:52 +02:00 committed by Anas Nashif
commit 5881f118c0
63 changed files with 4 additions and 62 deletions

View file

@ -3,7 +3,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32F4X=y CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F412CG=y CONFIG_SOC_STM32F412CG=y
CONFIG_CORTEX_M_SYSTICK=y
# 84MHz system clock # 84MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000

View file

@ -2,7 +2,6 @@ CONFIG_ARM=y
CONFIG_BOARD_96B_AVENGER96=y CONFIG_BOARD_96B_AVENGER96=y
CONFIG_SOC_SERIES_STM32MP1X=y CONFIG_SOC_SERIES_STM32MP1X=y
CONFIG_SOC_STM32MP15_M4=y CONFIG_SOC_STM32MP15_M4=y
CONFIG_CORTEX_M_SYSTICK=y
# 209 MHz system clock (mlhclk_ck) # 209 MHz system clock (mlhclk_ck)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=209000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=209000000

View file

@ -3,7 +3,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32F4X=y CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F401XE=y CONFIG_SOC_STM32F401XE=y
CONFIG_CORTEX_M_SYSTICK=y
# 84MHz system clock # 84MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000

View file

@ -3,7 +3,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32F4X=y CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F411XE=y CONFIG_SOC_STM32F411XE=y
CONFIG_CORTEX_M_SYSTICK=y
# 84MHz system clock # 84MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_96B_STM32_SENSOR_MEZ=y CONFIG_BOARD_96B_STM32_SENSOR_MEZ=y
CONFIG_SOC_SERIES_STM32F4X=y CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F446XX=y CONFIG_SOC_STM32F446XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 84MHz system clock # 84MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000

View file

@ -1,7 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32L1X=y CONFIG_SOC_SERIES_STM32L1X=y
CONFIG_SOC_STM32L151XB=y CONFIG_SOC_STM32L151XB=y
CONFIG_CORTEX_M_SYSTICK=y
# 32MHz system clock # 32MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000

View file

@ -10,7 +10,6 @@ CONFIG_SOC_STM32L072XX=y
CONFIG_BOARD_B_L072Z_LRWAN1=y CONFIG_BOARD_B_L072Z_LRWAN1=y
# General Kernel Options # General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000
# Clock configuration # Clock configuration

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_DISCO_L475_IOT1=y CONFIG_BOARD_DISCO_L475_IOT1=y
CONFIG_SOC_SERIES_STM32L4X=y CONFIG_SOC_SERIES_STM32L4X=y
CONFIG_SOC_STM32L475XX=y CONFIG_SOC_STM32L475XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 80MHz system clock # 80MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000

View file

@ -10,7 +10,6 @@ CONFIG_SOC_STM32L072XX=y
CONFIG_BOARD_DRAGINO_LSN50=y CONFIG_BOARD_DRAGINO_LSN50=y
# General Kernel Options # General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000
# Serial Drivers # Serial Drivers

View file

@ -3,7 +3,6 @@ CONFIG_BOARD_MIKROE_MINI_M4_FOR_STM32=y
CONFIG_SOC_SERIES_STM32F4X=y CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F415XX=y CONFIG_SOC_STM32F415XX=y
# 168MHz system clock # 168MHz system clock
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000
# Enable MPU # Enable MPU

View file

@ -9,7 +9,6 @@ CONFIG_SOC_STM32F030X8=y
CONFIG_BOARD_NUCLEO_F030R8=y CONFIG_BOARD_NUCLEO_F030R8=y
# General Kernel Options # General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
# Kernel Options due to Low Memory (8k) # Kernel Options due to Low Memory (8k)

View file

@ -9,7 +9,6 @@ CONFIG_SOC_STM32F070XB=y
CONFIG_BOARD_NUCLEO_F070RB=y CONFIG_BOARD_NUCLEO_F070RB=y
# General Kernel Options # General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
# Serial Drivers # Serial Drivers

View file

@ -9,7 +9,6 @@ CONFIG_SOC_STM32F091XC=y
CONFIG_BOARD_NUCLEO_F091RC=y CONFIG_BOARD_NUCLEO_F091RC=y
# General Kernel Options # General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
# Serial Drivers # Serial Drivers

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_NUCLEO_F103RB=y CONFIG_BOARD_NUCLEO_F103RB=y
CONFIG_SOC_SERIES_STM32F1X=y CONFIG_SOC_SERIES_STM32F1X=y
CONFIG_SOC_STM32F103XB=y CONFIG_SOC_STM32F103XB=y
CONFIG_CORTEX_M_SYSTICK=y
# 72MHz system clock # 72MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_NUCLEO_F207ZG=y CONFIG_BOARD_NUCLEO_F207ZG=y
CONFIG_SOC_SERIES_STM32F2X=y CONFIG_SOC_SERIES_STM32F2X=y
CONFIG_SOC_STM32F207XX=y CONFIG_SOC_STM32F207XX=y
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=120000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=120000000
CONFIG_SERIAL=y CONFIG_SERIAL=y

View file

@ -3,7 +3,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32F3X=y CONFIG_SOC_SERIES_STM32F3X=y
CONFIG_SOC_STM32F302X8=y CONFIG_SOC_STM32F302X8=y
CONFIG_CORTEX_M_SYSTICK=y
# 72 MHz system clock # 72 MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000

View file

@ -9,7 +9,6 @@ CONFIG_SOC_STM32F334X8=y
CONFIG_BOARD_NUCLEO_F334R8=y CONFIG_BOARD_NUCLEO_F334R8=y
# General Kernel Options # General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
# Serial Drivers # Serial Drivers

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_NUCLEO_F401RE=y CONFIG_BOARD_NUCLEO_F401RE=y
CONFIG_SOC_SERIES_STM32F4X=y CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F401XE=y CONFIG_SOC_STM32F401XE=y
CONFIG_CORTEX_M_SYSTICK=y
# 84MHz system clock # 84MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_NUCLEO_F411RE=y CONFIG_BOARD_NUCLEO_F411RE=y
CONFIG_SOC_SERIES_STM32F4X=y CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F411XE=y CONFIG_SOC_STM32F411XE=y
CONFIG_CORTEX_M_SYSTICK=y
# 96MHz system clock (highest value to get a precise USB clock) # 96MHz system clock (highest value to get a precise USB clock)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_NUCLEO_F412ZG=y CONFIG_BOARD_NUCLEO_F412ZG=y
CONFIG_SOC_SERIES_STM32F4X=y CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F412ZG=y CONFIG_SOC_STM32F412ZG=y
CONFIG_CORTEX_M_SYSTICK=y
# 96MHz system clock (highest value to get a precise USB clock) # 96MHz system clock (highest value to get a precise USB clock)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_NUCLEO_F413ZH=y CONFIG_BOARD_NUCLEO_F413ZH=y
CONFIG_SOC_SERIES_STM32F4X=y CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F413XX=y CONFIG_SOC_STM32F413XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 96MHz system clock (highest value to get a precise USB clock) # 96MHz system clock (highest value to get a precise USB clock)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000

View file

@ -3,7 +3,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32F4X=y CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F429XX=y CONFIG_SOC_STM32F429XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 168MHz system clock (highest value to get a precise USB clock) # 168MHz system clock (highest value to get a precise USB clock)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_NUCLEO_F446RE=y CONFIG_BOARD_NUCLEO_F446RE=y
CONFIG_SOC_SERIES_STM32F4X=y CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F446XX=y CONFIG_SOC_STM32F446XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 96MHz system clock (highest value to get a precise USB clock) # 96MHz system clock (highest value to get a precise USB clock)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_NUCLEO_F746ZG=y CONFIG_BOARD_NUCLEO_F746ZG=y
CONFIG_SOC_SERIES_STM32F7X=y CONFIG_SOC_SERIES_STM32F7X=y
CONFIG_SOC_STM32F746XX=y CONFIG_SOC_STM32F746XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 72MHz system clock (CubeMX Defaults) # 72MHz system clock (CubeMX Defaults)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_NUCLEO_F756ZG=y CONFIG_BOARD_NUCLEO_F756ZG=y
CONFIG_SOC_SERIES_STM32F7X=y CONFIG_SOC_SERIES_STM32F7X=y
CONFIG_SOC_STM32F756XX=y CONFIG_SOC_STM32F756XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 72MHz system clock (CubeMX Defaults) # 72MHz system clock (CubeMX Defaults)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000

View file

@ -2,7 +2,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32G0X=y CONFIG_SOC_SERIES_STM32G0X=y
CONFIG_SOC_STM32G071XX=y CONFIG_SOC_STM32G071XX=y
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_BOARD_NUCLEO_G071RB=y CONFIG_BOARD_NUCLEO_G071RB=y
# 64MHz system clock # 64MHz system clock

View file

@ -3,7 +3,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32G4X=y CONFIG_SOC_SERIES_STM32G4X=y
CONFIG_SOC_STM32G431XX=y CONFIG_SOC_STM32G431XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 170MHz system clock only in 'boost power' mode. RM0440, section # 170MHz system clock only in 'boost power' mode. RM0440, section
# 5.1.5 states that the R1MODE bit must be cleared before system can # 5.1.5 states that the R1MODE bit must be cleared before system can

View file

@ -10,7 +10,6 @@ CONFIG_SOC_STM32L053XX=y
CONFIG_BOARD_NUCLEO_L053R8=y CONFIG_BOARD_NUCLEO_L053R8=y
# General Kernel Options # General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000
# Kernel Options due to Low Memory (8k) # Kernel Options due to Low Memory (8k)

View file

@ -9,7 +9,6 @@ CONFIG_SOC_STM32L073XX=y
CONFIG_BOARD_NUCLEO_L073RZ=y CONFIG_BOARD_NUCLEO_L073RZ=y
# General Kernel Options # General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000
# Serial Drivers # Serial Drivers

View file

@ -3,7 +3,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32L4X=y CONFIG_SOC_SERIES_STM32L4X=y
CONFIG_SOC_STM32L432XX=y CONFIG_SOC_STM32L432XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 80MHz system clock # 80MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000

View file

@ -3,7 +3,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32L4X=y CONFIG_SOC_SERIES_STM32L4X=y
CONFIG_SOC_STM32L476XX=y CONFIG_SOC_STM32L476XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 80MHz system clock # 80MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000

View file

@ -3,7 +3,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32L4X=y CONFIG_SOC_SERIES_STM32L4X=y
CONFIG_SOC_STM32L496XX=y CONFIG_SOC_STM32L496XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 80MHz system clock # 80MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32L4X=y CONFIG_SOC_SERIES_STM32L4X=y
CONFIG_SOC_STM32L4R5XX=y CONFIG_SOC_STM32L4R5XX=y
CONFIG_BOARD_NUCLEO_L4R5ZI=y CONFIG_BOARD_NUCLEO_L4R5ZI=y
CONFIG_CORTEX_M_SYSTICK=y
# 120MHz system clock only in 'boost power' mode. DM00310109, section # 120MHz system clock only in 'boost power' mode. DM00310109, section
# 5.1.7 states that the R1MODE bit must be cleared before system can # 5.1.7 states that the R1MODE bit must be cleared before system can

View file

@ -1,7 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32WBX=y CONFIG_SOC_SERIES_STM32WBX=y
CONFIG_SOC_STM32WB55XX=y CONFIG_SOC_STM32WB55XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 32MHz system clock # 32MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_OLIMEX_STM32_E407=y CONFIG_BOARD_OLIMEX_STM32_E407=y
CONFIG_SOC_SERIES_STM32F4X=y CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F407XG=y CONFIG_SOC_STM32F407XG=y
CONFIG_CORTEX_M_SYSTICK=y
# 168MHz system clock # 168MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_OLIMEX_STM32_H407=y CONFIG_BOARD_OLIMEX_STM32_H407=y
CONFIG_SOC_SERIES_STM32F4X=y CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F407XG=y CONFIG_SOC_STM32F407XG=y
CONFIG_CORTEX_M_SYSTICK=y
# 168MHz system clock # 168MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_OLIMEX_STM32_P405=y CONFIG_BOARD_OLIMEX_STM32_P405=y
CONFIG_SOC_SERIES_STM32F4X=y CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F405XG=y CONFIG_SOC_STM32F405XG=y
CONFIG_CORTEX_M_SYSTICK=y
# 168MHz system clock # 168MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_OLIMEXINO_STM32=y CONFIG_BOARD_OLIMEXINO_STM32=y
CONFIG_SOC_SERIES_STM32F1X=y CONFIG_SOC_SERIES_STM32F1X=y
CONFIG_SOC_STM32F103XB=y CONFIG_SOC_STM32F103XB=y
CONFIG_CORTEX_M_SYSTICK=y
# 72MHz system clock # 72MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32L4X=y CONFIG_SOC_SERIES_STM32L4X=y
CONFIG_SOC_STM32L4R9XX=y CONFIG_SOC_STM32L4R9XX=y
CONFIG_BOARD_SENSORTILE_BOX=y CONFIG_BOARD_SENSORTILE_BOX=y
CONFIG_CORTEX_M_SYSTICK=y
# 120MHz system clock only in 'boost power' mode. DM00310109, section # 120MHz system clock only in 'boost power' mode. DM00310109, section
# 5.1.7 states that the R1MODE bit must be cleared before system can # 5.1.7 states that the R1MODE bit must be cleared before system can

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STEVAL_FCU001V1=y CONFIG_BOARD_STEVAL_FCU001V1=y
CONFIG_SOC_SERIES_STM32F4X=y CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F401XC=y CONFIG_SOC_STM32F401XC=y
CONFIG_CORTEX_M_SYSTICK=y
# 84MHz system clock # 84MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000

View file

@ -9,7 +9,6 @@ CONFIG_SOC_STM32F107XC=y
CONFIG_BOARD_STM3210C_EVAL=y CONFIG_BOARD_STM3210C_EVAL=y
# General Kernel Options # General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
# 72MHz system clock # 72MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000

View file

@ -15,7 +15,6 @@ CONFIG_CPU_HAS_FPU=y
CONFIG_FLOAT=y CONFIG_FLOAT=y
# General Kernel Options # General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
# Serial Drivers # Serial Drivers

View file

@ -9,7 +9,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32_MIN_DEV_BLACK=y CONFIG_BOARD_STM32_MIN_DEV_BLACK=y
CONFIG_SOC_SERIES_STM32F1X=y CONFIG_SOC_SERIES_STM32F1X=y
CONFIG_SOC_STM32F103X8=y CONFIG_SOC_STM32F103X8=y
CONFIG_CORTEX_M_SYSTICK=y
# 72MHz system clock # 72MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32_MIN_DEV_BLUE=y CONFIG_BOARD_STM32_MIN_DEV_BLUE=y
CONFIG_SOC_SERIES_STM32F1X=y CONFIG_SOC_SERIES_STM32F1X=y
CONFIG_SOC_STM32F103X8=y CONFIG_SOC_STM32F103X8=y
CONFIG_CORTEX_M_SYSTICK=y
# 72MHz system clock # 72MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000

View file

@ -9,7 +9,6 @@ CONFIG_SOC_STM32F030X4=y
CONFIG_BOARD_STM32F030_DEMO=y CONFIG_BOARD_STM32F030_DEMO=y
# General Kernel Options # General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
# Kernel Options due to Low Memory (4k) # Kernel Options due to Low Memory (4k)

View file

@ -10,7 +10,6 @@ CONFIG_SOC_STM32F072XB=y
CONFIG_BOARD_STM32F072_EVAL=y CONFIG_BOARD_STM32F072_EVAL=y
# General Kernel Options # General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
# Serial Drivers # Serial Drivers

View file

@ -9,7 +9,6 @@ CONFIG_SOC_STM32F072XB=y
CONFIG_BOARD_STM32F072B_DISCO=y CONFIG_BOARD_STM32F072B_DISCO=y
# General Kernel Options # General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
# Serial Drivers # Serial Drivers

View file

@ -9,7 +9,6 @@ CONFIG_SOC_STM32F051X8=y
CONFIG_BOARD_STM32F0_DISCO=y CONFIG_BOARD_STM32F0_DISCO=y
# General Kernel Options # General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
# Kernel Options due to Low Memory (8k) # Kernel Options due to Low Memory (8k)

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32F3_DISCO=y CONFIG_BOARD_STM32F3_DISCO=y
CONFIG_SOC_SERIES_STM32F3X=y CONFIG_SOC_SERIES_STM32F3X=y
CONFIG_SOC_STM32F303XC=y CONFIG_SOC_STM32F303XC=y
CONFIG_CORTEX_M_SYSTICK=y
# 72MHz system clock # 72MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32F411E_DISCO=y CONFIG_BOARD_STM32F411E_DISCO=y
CONFIG_SOC_SERIES_STM32F4X=y CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F411XE=y CONFIG_SOC_STM32F411XE=y
CONFIG_CORTEX_M_SYSTICK=y
# 100MHz system clock (highest value to get a precise USB clock should be 96MHz) # 100MHz system clock (highest value to get a precise USB clock should be 96MHz)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=100000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=100000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32F412G_DISCO=y CONFIG_BOARD_STM32F412G_DISCO=y
CONFIG_SOC_SERIES_STM32F4X=y CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F412ZG=y CONFIG_SOC_STM32F412ZG=y
CONFIG_CORTEX_M_SYSTICK=y
# 100MHz system clock (highest value to get a precise USB clock should be 96MHz) # 100MHz system clock (highest value to get a precise USB clock should be 96MHz)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=100000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=100000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32F429I_DISC1=y CONFIG_BOARD_STM32F429I_DISC1=y
CONFIG_SOC_SERIES_STM32F4X=y CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F429XX=y CONFIG_SOC_STM32F429XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 168MHz system clock # 168MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32F469I_DISCO=y CONFIG_BOARD_STM32F469I_DISCO=y
CONFIG_SOC_SERIES_STM32F4X=y CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F469XX=y CONFIG_SOC_STM32F469XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 180MHz system clock # 180MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=180000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=180000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32F4_DISCO=y CONFIG_BOARD_STM32F4_DISCO=y
CONFIG_SOC_SERIES_STM32F4X=y CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F407XG=y CONFIG_SOC_STM32F407XG=y
CONFIG_CORTEX_M_SYSTICK=y
# 168MHz system clock # 168MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32F723E_DISCO=y CONFIG_BOARD_STM32F723E_DISCO=y
CONFIG_SOC_SERIES_STM32F7X=y CONFIG_SOC_SERIES_STM32F7X=y
CONFIG_SOC_STM32F723XX=y CONFIG_SOC_STM32F723XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 216MHz system clock # 216MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=216000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=216000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32F746G_DISCO=y CONFIG_BOARD_STM32F746G_DISCO=y
CONFIG_SOC_SERIES_STM32F7X=y CONFIG_SOC_SERIES_STM32F7X=y
CONFIG_SOC_STM32F746XX=y CONFIG_SOC_STM32F746XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 216MHz system clock # 216MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=216000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=216000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32F769I_DISCO=y CONFIG_BOARD_STM32F769I_DISCO=y
CONFIG_SOC_SERIES_STM32F7X=y CONFIG_SOC_SERIES_STM32F7X=y
CONFIG_SOC_STM32F769XX=y CONFIG_SOC_STM32F769XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 216MHz system clock # 216MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=216000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=216000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32H747I_DISCO_M4=y CONFIG_BOARD_STM32H747I_DISCO_M4=y
CONFIG_SOC_SERIES_STM32H7X=y CONFIG_SOC_SERIES_STM32H7X=y
CONFIG_SOC_STM32H747XX=y CONFIG_SOC_STM32H747XX=y
CONFIG_CORTEX_M_SYSTICK=y
# enable pinmux # enable pinmux
CONFIG_PINMUX=y CONFIG_PINMUX=y

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32H747I_DISCO_M7=y CONFIG_BOARD_STM32H747I_DISCO_M7=y
CONFIG_SOC_SERIES_STM32H7X=y CONFIG_SOC_SERIES_STM32H7X=y
CONFIG_SOC_STM32H747XX=y CONFIG_SOC_STM32H747XX=y
CONFIG_CORTEX_M_SYSTICK=y
# enable pinmux # enable pinmux
CONFIG_PINMUX=y CONFIG_PINMUX=y

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32L476G_DISCO=y CONFIG_BOARD_STM32L476G_DISCO=y
CONFIG_SOC_SERIES_STM32L4X=y CONFIG_SOC_SERIES_STM32L4X=y
CONFIG_SOC_STM32L476XX=y CONFIG_SOC_STM32L476XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 80MHz system clock # 80MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000

View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32L496G_DISCO=y CONFIG_BOARD_STM32L496G_DISCO=y
CONFIG_SOC_SERIES_STM32L4X=y CONFIG_SOC_SERIES_STM32L4X=y
CONFIG_SOC_STM32L496XX=y CONFIG_SOC_STM32L496XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 80MHz system clock # 80MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000

View file

@ -2,7 +2,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32MP157C_DK2=y CONFIG_BOARD_STM32MP157C_DK2=y
CONFIG_SOC_SERIES_STM32MP1X=y CONFIG_SOC_SERIES_STM32MP1X=y
CONFIG_SOC_STM32MP15_M4=y CONFIG_SOC_STM32MP15_M4=y
CONFIG_CORTEX_M_SYSTICK=y
# 209 MHz system clock (mlhclk_ck) # 209 MHz system clock (mlhclk_ck)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=209000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=209000000

View file

@ -9,6 +9,10 @@
if SOC_FAMILY_STM32 if SOC_FAMILY_STM32
# SYSTICK is the default tick source on STM32 Socs
config CORTEX_M_SYSTICK
default y
if CLOCK_CONTROL if CLOCK_CONTROL
config CLOCK_CONTROL_STM32_CUBE config CLOCK_CONTROL_STM32_CUBE