riscv: Add support for floating point
This change adds full shared floating point support for the RISCV architecture with minimal impact on threads with floating point support not enabled. Signed-off-by: Corey Wharton <coreyw7@fb.com>
This commit is contained in:
Corey Wharton
Andrew Boie
parent
7dd4cc5821
commit
58232d58e0
14 changed files with 667 additions and 18 deletions
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@ -9,6 +9,62 @@
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#include <linker/sections.h>
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#include <offsets_short.h>
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#include <arch/cpu.h>
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#include <sys/util.h>
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#include <kernel.h>
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/* Convenience macros for loading/storing register states. */
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#define DO_FP_CALLER_SAVED(op, reg) \
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op ft0, __z_arch_esf_t_ft0_OFFSET(reg) ;\
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op ft1, __z_arch_esf_t_ft1_OFFSET(reg) ;\
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op ft2, __z_arch_esf_t_ft2_OFFSET(reg) ;\
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op ft3, __z_arch_esf_t_ft3_OFFSET(reg) ;\
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op ft4, __z_arch_esf_t_ft4_OFFSET(reg) ;\
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op ft5, __z_arch_esf_t_ft5_OFFSET(reg) ;\
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op ft6, __z_arch_esf_t_ft6_OFFSET(reg) ;\
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op ft7, __z_arch_esf_t_ft7_OFFSET(reg) ;\
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op ft8, __z_arch_esf_t_ft8_OFFSET(reg) ;\
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op ft9, __z_arch_esf_t_ft9_OFFSET(reg) ;\
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op ft10, __z_arch_esf_t_ft10_OFFSET(reg) ;\
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op ft11, __z_arch_esf_t_ft11_OFFSET(reg) ;\
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op fa0, __z_arch_esf_t_fa0_OFFSET(reg) ;\
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op fa1, __z_arch_esf_t_fa1_OFFSET(reg) ;\
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op fa2, __z_arch_esf_t_fa2_OFFSET(reg) ;\
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op fa3, __z_arch_esf_t_fa3_OFFSET(reg) ;\
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op fa4, __z_arch_esf_t_fa4_OFFSET(reg) ;\
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op fa5, __z_arch_esf_t_fa5_OFFSET(reg) ;\
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op fa6, __z_arch_esf_t_fa6_OFFSET(reg) ;\
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op fa7, __z_arch_esf_t_fa7_OFFSET(reg) ;
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#define STORE_FP_CALLER_SAVED(reg) \
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DO_FP_CALLER_SAVED(RV_OP_STOREFPREG, reg)
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#define LOAD_FP_CALLER_SAVED(reg) \
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DO_FP_CALLER_SAVED(RV_OP_LOADFPREG, reg)
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#define DO_FP_CALLEE_SAVED(op, reg) \
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op fs0, _thread_offset_to_fs0(reg) ;\
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op fs1, _thread_offset_to_fs1(reg) ;\
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op fs2, _thread_offset_to_fs2(reg) ;\
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op fs3, _thread_offset_to_fs3(reg) ;\
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op fs4, _thread_offset_to_fs4(reg) ;\
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op fs5, _thread_offset_to_fs5(reg) ;\
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op fs6, _thread_offset_to_fs6(reg) ;\
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op fs7, _thread_offset_to_fs7(reg) ;\
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op fs8, _thread_offset_to_fs8(reg) ;\
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op fs9, _thread_offset_to_fs9(reg) ;\
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op fs10, _thread_offset_to_fs10(reg) ;\
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op fs11, _thread_offset_to_fs11(reg) ;
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#define STORE_FP_CALLEE_SAVED(reg) \
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frcsr t2 ;\
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RV_OP_STOREREG t2, _thread_offset_to_fcsr(reg) ;\
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DO_FP_CALLEE_SAVED(RV_OP_STOREFPREG, reg)
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#define LOAD_FP_CALLEE_SAVED(reg) \
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RV_OP_LOADREG t2, _thread_offset_to_fcsr(reg) ;\
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fscsr x0, t2 ;\
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DO_FP_CALLEE_SAVED(RV_OP_LOADFPREG, reg)
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/* imports */
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GDATA(_sw_isr_table)
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@ -68,12 +124,7 @@ SECTION_FUNC(exception.entry, __irq_wrapper)
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/* Allocate space on thread stack to save registers */
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addi sp, sp, -__z_arch_esf_t_SIZEOF
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/*
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* Save caller-saved registers on current thread stack.
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* NOTE: need to be updated to account for floating-point registers
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* floating-point registers should be accounted for when corresponding
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* config variable is set
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*/
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/* Save caller-saved registers on current thread stack. */
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RV_OP_STOREREG ra, __z_arch_esf_t_ra_OFFSET(sp)
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RV_OP_STOREREG gp, __z_arch_esf_t_gp_OFFSET(sp)
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RV_OP_STOREREG tp, __z_arch_esf_t_tp_OFFSET(sp)
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@ -93,6 +144,19 @@ SECTION_FUNC(exception.entry, __irq_wrapper)
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RV_OP_STOREREG a6, __z_arch_esf_t_a6_OFFSET(sp)
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RV_OP_STOREREG a7, __z_arch_esf_t_a7_OFFSET(sp)
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#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING)
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/* Assess whether floating-point registers need to be saved. */
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la t0, _kernel
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RV_OP_LOADREG t0, _kernel_offset_to_current(t0)
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RV_OP_LOADREG t0, _thread_offset_to_user_options(t0)
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andi t0, t0, K_FP_REGS
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RV_OP_STOREREG t0, __z_arch_esf_t_fp_state_OFFSET(sp)
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beqz t0, skip_store_fp_caller_saved
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STORE_FP_CALLER_SAVED(sp)
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skip_store_fp_caller_saved:
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#endif
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/* Save MEPC register */
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csrr t0, mepc
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RV_OP_STOREREG t0, __z_arch_esf_t_mepc_OFFSET(sp)
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@ -332,6 +396,16 @@ reschedule:
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RV_OP_STOREREG s10, _thread_offset_to_s10(t1)
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RV_OP_STOREREG s11, _thread_offset_to_s11(t1)
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#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING)
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/* Assess whether floating-point registers need to be saved. */
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RV_OP_LOADREG t2, _thread_offset_to_user_options(t1)
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andi t2, t2, K_FP_REGS
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beqz t2, skip_store_fp_callee_saved
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STORE_FP_CALLEE_SAVED(t1)
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skip_store_fp_callee_saved:
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#endif
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/*
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* Save stack pointer of current thread and set the default return value
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* of z_swap to _k_neg_eagain for the thread.
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@ -366,6 +440,26 @@ reschedule:
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RV_OP_LOADREG s10, _thread_offset_to_s10(t1)
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RV_OP_LOADREG s11, _thread_offset_to_s11(t1)
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#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING)
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/* Determine if we need to restore floating-point registers. */
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RV_OP_LOADREG t2, _thread_offset_to_user_options(t1)
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andi t2, t2, K_FP_REGS
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beqz t2, skip_load_fp_callee_saved
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/*
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* If we are switching from a thread with floating-point disabled the
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* mstatus FS bits will still be cleared, which can cause an illegal
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* instruction fault. Set the FS state before restoring the registers.
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* mstatus will be restored later on.
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*/
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li t2, MSTATUS_FS_INIT
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csrrs x0, mstatus, t2
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LOAD_FP_CALLEE_SAVED(t1)
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skip_load_fp_callee_saved:
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#endif
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#ifdef CONFIG_EXECUTION_BENCHMARKING
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addi sp, sp, -__z_arch_esf_t_SIZEOF
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@ -388,6 +482,17 @@ reschedule:
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RV_OP_STOREREG a6, __z_arch_esf_t_a6_OFFSET(sp)
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RV_OP_STOREREG a7, __z_arch_esf_t_a7_OFFSET(sp)
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#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING)
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/* Assess whether floating-point registers need to be saved. */
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RV_OP_LOADREG t2, _thread_offset_to_user_options(sp)
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andi t2, t2, K_FP_REGS
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RV_OP_STOREREG t2, __z_arch_esf_t_fp_state_OFFSET(sp)
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beqz t2, skip_store_fp_caller_saved_benchmark
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STORE_FP_CALLER_SAVED(sp)
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skip_store_fp_caller_saved_benchmark:
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#endif
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call read_timer_end_of_swap
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RV_OP_LOADREG ra, __z_arch_esf_t_ra_OFFSET(sp)
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@ -409,6 +514,15 @@ reschedule:
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RV_OP_LOADREG a6, __z_arch_esf_t_a6_OFFSET(sp)
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RV_OP_LOADREG a7, __z_arch_esf_t_a7_OFFSET(sp)
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#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING)
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/* Determine if we need to restore floating-point registers. */
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RV_OP_LOADREG t2, __z_arch_esf_t_fp_state_OFFSET(sp)
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beqz t2, skip_load_fp_caller_saved_benchmark
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LOAD_FP_CALLER_SAVED(sp)
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skip_load_fp_caller_saved_benchmark:
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#endif
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/* Release stack space */
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addi sp, sp, __z_arch_esf_t_SIZEOF
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#endif
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@ -448,6 +562,15 @@ no_reschedule:
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RV_OP_LOADREG a6, __z_arch_esf_t_a6_OFFSET(sp)
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RV_OP_LOADREG a7, __z_arch_esf_t_a7_OFFSET(sp)
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#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING)
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/* Determine if we need to restore floating-point registers. */
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RV_OP_LOADREG t0, __z_arch_esf_t_fp_state_OFFSET(sp)
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beqz t0, skip_load_fp_caller_saved
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LOAD_FP_CALLER_SAVED(sp)
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skip_load_fp_caller_saved:
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#endif
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/* Release stack space */
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addi sp, sp, __z_arch_esf_t_SIZEOF
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