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arm: tests: kernel: fix bug in fatal_exception test

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In ARM architectures the entry_cpu_exception_extend calls
svc #0 when trying to generate a `K_ERR_CPU_EXCEPTION`, however
z_arm_svc calls z_do_oops with a stack frame only, and gets the
reason from `r0`. This means that the test working was just lucky
and running it with another compiler (or setting the value of r0
before the svc #0 call, made the test fail).

Cortex-A/R 32-bit architectures was doing a BKPT, this works better
but will not be a hard exception when debugger is attached.

I switched all the Cortex 32-bits to the ARM specified undefined
instruction.

Also RISC-V has a designated unimp instruction that should be used to
guarantee trap.

Signed-off-by: Robin Kastberg <robin.kastberg@iar.com>
This commit is contained in:
Robin Kastberg 2024-11-01 21:14:08 +01:00 • committed by Dan Kalowsky
commit 580e93e9b4
1 changed files with 3 additions and 3 deletions
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6
tests/kernel/fatal/exception/src/main.c
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@ -108,16 +108,16 @@ void entry_cpu_exception_extend(void *p1, void *p2, void *p3)
#if defined(CONFIG_ARM64)
__asm__ volatile ("svc 0");
#elif defined(CONFIG_CPU_AARCH32_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
__asm__ volatile ("BKPT");
__asm__ volatile ("udf #0");
#elif defined(CONFIG_CPU_CORTEX_M)
__asm__ volatile ("swi 0");
__asm__ volatile ("udf #0");
#elif defined(CONFIG_NIOS2)
__asm__ volatile ("trap");
#elif defined(CONFIG_RISCV)
/* In riscv architecture, use an undefined
* instruction to trigger illegal instruction on RISCV.
*/
__asm__ volatile (".word 0x77777777");
__asm__ volatile ("unimp");
/* In arc architecture, SWI instruction is used
* to trigger soft interrupt.
*/