From 57f30bd8cc55cbe5202228af4b79e9caad543d2d Mon Sep 17 00:00:00 2001 From: Andy Ross Date: Fri, 9 Feb 2018 14:48:02 -0800 Subject: [PATCH] esp32: Move hard firmware function addresses to the linker script This matches the way other firmware-provided functions are done. Signed-off-by: Andy Ross --- arch/xtensa/soc/esp32/esp32-mp.c | 14 +++----------- arch/xtensa/soc/esp32/linker.ld | 3 +++ arch/xtensa/soc/esp32/soc.h | 4 ++++ 3 files changed, 10 insertions(+), 11 deletions(-) diff --git a/arch/xtensa/soc/esp32/esp32-mp.c b/arch/xtensa/soc/esp32/esp32-mp.c index d7353284c9a..2fd37c3b8f6 100644 --- a/arch/xtensa/soc/esp32/esp32-mp.c +++ b/arch/xtensa/soc/esp32/esp32-mp.c @@ -28,14 +28,6 @@ #define DPORT_APPCPU_RUNSTALL BIT(0) #define DPORT_APPCPU_RESETTING BIT(0) -/* These calls are ROM-resident and have fixed addresses. No, I don't - * know how they plan on updating these portably either. - */ -typedef void (*esp32rom_call_t)(int); -static const esp32rom_call_t esp32rom_Cache_Flush = (void *)0x40009a14; -static const esp32rom_call_t esp32rom_Cache_Read_Enable = (void *)0x40009a84; -static const esp32rom_call_t esp32rom_ets_set_appcpu_boot_addr = (void *)0x4000689c; - struct cpustart_rec { int cpu; void (*fn)(int, void *); @@ -151,8 +143,8 @@ static void appcpu_start(void) * definition, so we can skip that complexity and just call * the ROM directly. */ - esp32rom_Cache_Flush(1); - esp32rom_Cache_Read_Enable(1); + esp32_rom_Cache_Flush(1); + esp32_rom_Cache_Read_Enable(1); RTC_CNTL_SW_CPU_STALL &= ~RTC_CNTL_SW_STALL_APPCPU_C1; RTC_CNTL_OPTIONS0 &= ~RTC_CNTL_SW_STALL_APPCPU_C0; @@ -166,7 +158,7 @@ static void appcpu_start(void) /* Seems weird that you set the boot address AFTER starting * the CPU, but this is how they do it... */ - esp32rom_ets_set_appcpu_boot_addr((uint32_t)appcpu_entry1); + esp32_rom_ets_set_appcpu_boot_addr((void *)appcpu_entry1); } void _arch_start_cpu(int cpu_num, k_thread_stack_t *stack, int sz, diff --git a/arch/xtensa/soc/esp32/linker.ld b/arch/xtensa/soc/esp32/linker.ld index e9e53e6c0e5..a3f35b27df4 100644 --- a/arch/xtensa/soc/esp32/linker.ld +++ b/arch/xtensa/soc/esp32/linker.ld @@ -30,6 +30,9 @@ PROVIDE ( esp32_rom_uart_attach = 0x40008fd0 ); PROVIDE ( esp32_rom_intr_matrix_set = 0x4000681c ); PROVIDE ( esp32_rom_gpio_matrix_in = 0x40009edc ); PROVIDE ( esp32_rom_gpio_matrix_out = 0x40009f0c ); +PROVIDE ( esp32_rom_Cache_Flush = 0x40009a14 ); +PROVIDE ( esp32_rom_Cache_Read_Enable = 0x40009a84 ); +PROVIDE ( esp32_rom_ets_set_appcpu_boot_addr = 0x4000689c ); MEMORY { diff --git a/arch/xtensa/soc/esp32/soc.h b/arch/xtensa/soc/esp32/soc.h index 8fb99b24219..01aff3d5842 100644 --- a/arch/xtensa/soc/esp32/soc.h +++ b/arch/xtensa/soc/esp32/soc.h @@ -26,4 +26,8 @@ extern void esp32_rom_uart_attach(void); extern STATUS esp32_rom_uart_tx_one_char(u8_t chr); extern STATUS esp32_rom_uart_rx_one_char(u8_t *chr); +extern void esp32_rom_Cache_Flush(int cpu); +extern void esp32_rom_Cache_Read_Enable(int cpu); +extern void esp32_rom_ets_set_appcpu_boot_addr(void *addr); + #endif /* __SOC_H__ */