boards: nucleo_l476rg: enable support of LL Cube clock control driver
Activate support of LL Cube based Clock control driver Note that prescaler should now use actual numerical value used for calculation and not register value (hence 1 instead of 0) Change-Id: Ia3a26bffbd470c6e958fd2ca82b8eb071beb6ca8 Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
parent
7fad8de120
commit
56b526c3a3
1 changed files with 16 additions and 1 deletions
|
@ -31,7 +31,22 @@ CONFIG_GPIO_STM32_PORTH=y
|
||||||
|
|
||||||
# clock configuration
|
# clock configuration
|
||||||
CONFIG_CLOCK_CONTROL=y
|
CONFIG_CLOCK_CONTROL=y
|
||||||
CONFIG_CLOCK_CONTROL_STM32L4X=y
|
CONFIG_CLOCK_CONTROL_STM32_CUBE=y
|
||||||
|
# SYSCLK selection
|
||||||
|
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
|
||||||
|
# PLL configuration
|
||||||
|
CONFIG_CLOCK_STM32_PLL_SRC_HSI
|
||||||
|
# produce 80MHz clock at PLL output
|
||||||
|
CONFIG_CLOCK_STM32_PLL_M_DIVISOR=1
|
||||||
|
CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=20
|
||||||
|
CONFIG_CLOCK_STM32_PLL_P_DIVISOR=7
|
||||||
|
CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=2
|
||||||
|
CONFIG_CLOCK_STM32_PLL_R_DIVISOR=4
|
||||||
|
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
|
||||||
|
CONFIG_CLOCK_STM32_APB1_PRESCALER=1
|
||||||
|
CONFIG_CLOCK_STM32_APB2_PRESCALER=1
|
||||||
|
|
||||||
|
CONFIG_CLOCK_CONTROL_STM32L4X=n
|
||||||
CONFIG_CLOCK_STM32L4X_SYSCLK_SRC_PLL=y
|
CONFIG_CLOCK_STM32L4X_SYSCLK_SRC_PLL=y
|
||||||
# use 16MHz oscillator
|
# use 16MHz oscillator
|
||||||
CONFIG_CLOCK_STM32F10X_PLL_SRC_HSI=y
|
CONFIG_CLOCK_STM32F10X_PLL_SRC_HSI=y
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue