tests: arch: arm: interrupt: add test-case for spurious exception
We add a simple test case to verify the behavior of z_arm_exc_spurious handler. We use the SysTick interrupt for that so the test is enabled for platforms that have but do not use the SysTick. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
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2 changed files with 35 additions and 1 deletions
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@ -7,7 +7,8 @@ Description:
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The first test verifies that we can handle system fault conditions
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The first test verifies that we can handle system fault conditions
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while running in handler mode (i.e. in an ISR). Only for ARM
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while running in handler mode (i.e. in an ISR). Only for ARM
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Cortex-M targets. The test also verifies the behavior of the
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Cortex-M targets. The test also verifies the behavior of the
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spurious interrupt handler.
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spurious interrupt handler, as well as the ARM spurious exception
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handler.
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The second test verifies that threads in user mode, despite being able to call
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The second test verifies that threads in user mode, despite being able to call
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the irq_lock() and irq_unlock() functions without triggering a CPU fault,
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the irq_lock() and irq_unlock() functions without triggering a CPU fault,
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@ -47,6 +47,15 @@ void arm_isr_handler(void *args)
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/* Intentional ASSERT */
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/* Intentional ASSERT */
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expected_reason = K_ERR_KERNEL_PANIC;
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expected_reason = K_ERR_KERNEL_PANIC;
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__ASSERT(0, "Intentional assert\n");
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__ASSERT(0, "Intentional assert\n");
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} else if (test_flag == 4) {
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#if defined(CONFIG_CPU_CORTEX_M_HAS_SYSTICK)
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#if !defined(CONFIG_SYS_CLOCK_EXISTS) || !defined(CONFIG_CORTEX_M_SYSTICK)
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expected_reason = K_ERR_CPU_EXCEPTION;
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SCB->ICSR |= SCB_ICSR_PENDSTSET_Msk;
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__DSB();
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__ISB();
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#endif
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#endif
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}
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}
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}
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}
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@ -132,6 +141,30 @@ void test_arm_interrupt(void)
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post_flag = test_flag;
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post_flag = test_flag;
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zassert_true(post_flag == j, "Test flag not set by ISR\n");
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zassert_true(post_flag == j, "Test flag not set by ISR\n");
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}
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}
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#if defined(CONFIG_CPU_CORTEX_M_HAS_SYSTICK)
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#if !defined(CONFIG_SYS_CLOCK_EXISTS) || !defined(CONFIG_CORTEX_M_SYSTICK)
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/* Verify that triggering a Cortex-M exception (accidentally) that has
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* not been installed in the vector table, leads to the reserved
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* exception been called and a resulting CPU fault. We test this using
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* the SysTick exception in platforms that are not expecting to use the
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* SysTick timer for system timing.
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*/
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/* The ISR will manually set the SysTick exception to pending state. */
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NVIC_SetPendingIRQ(i);
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__DSB();
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__ISB();
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/* Verify that the spurious exception has led to the fault and the
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* expected reason variable is reset.
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*/
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reason = expected_reason;
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zassert_equal(reason, -1,
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"expected_reason has not been reset (%d)\n", reason);
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#endif
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#endif
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}
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}
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#if defined(CONFIG_USERSPACE)
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#if defined(CONFIG_USERSPACE)
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