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bluetooth: controller: replace SOC_NRF52840 in ifdef blocks for Coded

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We have introduced option HAS_HW_NRF_RADIO_BLE_CODED, which
reflects that an nRF SoC has a Radio with LE Coded PHY
capabilities. We now modify all #ifdef expressions for
Coded PHY in the nRF controller port, removing SOC_NRF52840
and adding this new option instead. This allows to build
an nRF controller with Coded PHY support for SOCs other
than nRF52840.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit is contained in:
Ioannis Glaropoulos 2019-09-19 17:20:33 +02:00 • committed by Carles Cufí
commit 5692ee17ed
2 changed files with 22 additions and 19 deletions
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27
subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio.c
View file

@ -205,7 +205,7 @@ void radio_pkt_configure(u8_t bits_len, u8_t max_len, u8_t flags)
break; break;
#if defined(CONFIG_BT_CTLR_PHY_CODED) #if defined(CONFIG_BT_CTLR_PHY_CODED)
#if defined(CONFIG_SOC_NRF52840) #if defined(CONFIG_HAS_HW_NRF_RADIO_BLE_CODED)
case BIT(2): case BIT(2):
extra |= (RADIO_PCNF0_PLEN_LongRange << RADIO_PCNF0_PLEN_Pos) & extra |= (RADIO_PCNF0_PLEN_LongRange << RADIO_PCNF0_PLEN_Pos) &
RADIO_PCNF0_PLEN_Msk; RADIO_PCNF0_PLEN_Msk;
@ -213,7 +213,7 @@ void radio_pkt_configure(u8_t bits_len, u8_t max_len, u8_t flags)
extra |= (3UL << RADIO_PCNF0_TERMLEN_Pos) & extra |= (3UL << RADIO_PCNF0_TERMLEN_Pos) &
RADIO_PCNF0_TERMLEN_Msk; RADIO_PCNF0_TERMLEN_Msk;
break; break;
#endif /* CONFIG_SOC_NRF52840 */ #endif /* CONFIG_HAS_HW_NRF_RADIO_BLE_CODED */
#endif /* CONFIG_BT_CTLR_PHY_CODED */ #endif /* CONFIG_BT_CTLR_PHY_CODED */
} }
@ -407,7 +407,7 @@ static void sw_switch(u8_t dir, u8_t phy_curr, u8_t flags_curr, u8_t phy_next,
hal_radio_txen_on_sw_switch(ppi); hal_radio_txen_on_sw_switch(ppi);
#if defined(CONFIG_BT_CTLR_PHY_CODED) #if defined(CONFIG_BT_CTLR_PHY_CODED)
#if defined(CONFIG_SOC_NRF52840) #if defined(CONFIG_HAS_HW_NRF_RADIO_BLE_CODED)
u8_t ppi_en = u8_t ppi_en =
HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI(sw_tifs_toggle); HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI(sw_tifs_toggle);
u8_t ppi_dis = u8_t ppi_dis =
@ -445,7 +445,7 @@ static void sw_switch(u8_t dir, u8_t phy_curr, u8_t flags_curr, u8_t phy_next,
hal_radio_sw_switch_coded_config_clear(ppi_en, hal_radio_sw_switch_coded_config_clear(ppi_en,
ppi_dis, cc, sw_tifs_toggle); ppi_dis, cc, sw_tifs_toggle);
} }
#endif /* CONFIG_SOC_NRF52840 */ #endif /* CONFIG_HAS_HW_NRF_RADIO_BLE_CODED */
#endif /* CONFIG_BT_CTLR_PHY_CODED */ #endif /* CONFIG_BT_CTLR_PHY_CODED */
} else { } else {
/* RX */ /* RX */
@ -457,7 +457,7 @@ static void sw_switch(u8_t dir, u8_t phy_curr, u8_t flags_curr, u8_t phy_next,
hal_radio_rxen_on_sw_switch(ppi); hal_radio_rxen_on_sw_switch(ppi);
#if defined(CONFIG_BT_CTLR_PHY_CODED) #if defined(CONFIG_BT_CTLR_PHY_CODED)
#if defined(CONFIG_SOC_NRF52840) #if defined(CONFIG_HAS_HW_NRF_RADIO_BLE_CODED)
if (1) { if (1) {
u8_t ppi_en = u8_t ppi_en =
HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI( HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI(
@ -469,7 +469,7 @@ static void sw_switch(u8_t dir, u8_t phy_curr, u8_t flags_curr, u8_t phy_next,
hal_radio_sw_switch_coded_config_clear(ppi_en, hal_radio_sw_switch_coded_config_clear(ppi_en,
ppi_dis, cc, sw_tifs_toggle); ppi_dis, cc, sw_tifs_toggle);
} }
#endif /* CONFIG_SOC_NRF52840 */ #endif /* CONFIG_HAS_HW_NRF_RADIO_BLE_CODED */
#endif /* CONFIG_BT_CTLR_PHY_CODED */ #endif /* CONFIG_BT_CTLR_PHY_CODED */
} }
@ -621,12 +621,12 @@ void radio_tmr_status_reset(void)
BIT(HAL_RADIO_DISABLE_ON_HCTO_PPI) | BIT(HAL_RADIO_DISABLE_ON_HCTO_PPI) |
BIT(HAL_RADIO_END_TIME_CAPTURE_PPI) | BIT(HAL_RADIO_END_TIME_CAPTURE_PPI) |
#if defined(CONFIG_BT_CTLR_PHY_CODED) #if defined(CONFIG_BT_CTLR_PHY_CODED)
#if defined(CONFIG_SOC_NRF52840) #if defined(CONFIG_HAS_HW_NRF_RADIO_BLE_CODED)
BIT(HAL_TRIGGER_RATEOVERRIDE_PPI) | BIT(HAL_TRIGGER_RATEOVERRIDE_PPI) |
#if !defined(CONFIG_BT_CTLR_TIFS_HW) #if !defined(CONFIG_BT_CTLR_TIFS_HW)
BIT(HAL_SW_SWITCH_TIMER_S8_DISABLE_PPI) | BIT(HAL_SW_SWITCH_TIMER_S8_DISABLE_PPI) |
#endif /* !CONFIG_BT_CTLR_TIFS_HW */ #endif /* !CONFIG_BT_CTLR_TIFS_HW */
#endif /* CONFIG_SOC_NRF52840 */ #endif /* CONFIG_HAS_HW_NRF_RADIO_BLE_CODED */
#endif /* CONFIG_BT_CTLR_PHY_CODED */ #endif /* CONFIG_BT_CTLR_PHY_CODED */
BIT(HAL_TRIGGER_CRYPT_PPI)); BIT(HAL_TRIGGER_CRYPT_PPI));
} }
@ -679,15 +679,16 @@ u32_t radio_tmr_start(u8_t trx, u32_t ticks_start, u32_t remainder)
hal_sw_switch_timer_clear_ppi_config(); hal_sw_switch_timer_clear_ppi_config();
#if !defined(CONFIG_BT_CTLR_PHY_CODED) || !defined(CONFIG_SOC_NRF52840) #if !defined(CONFIG_BT_CTLR_PHY_CODED) || \
!defined(CONFIG_HAS_HW_NRF_RADIO_BLE_CODED)
hal_radio_group_task_disable_ppi_setup(); hal_radio_group_task_disable_ppi_setup();
#else /* CONFIG_BT_CTLR_PHY_CODED && CONFIG_SOC_NRF52840 */ #else /* CONFIG_BT_CTLR_PHY_CODED && CONFIG_HAS_HW_NRF_RADIO_BLE_CODED */
/* PPI setup needs to be configured at every sw_switch() /* PPI setup needs to be configured at every sw_switch()
* as they depend on the actual PHYs used in TX/RX mode. * as they depend on the actual PHYs used in TX/RX mode.
*/ */
#endif /* CONFIG_BT_CTLR_PHY_CODED && CONFIG_SOC_NRF52840 */ #endif /* CONFIG_BT_CTLR_PHY_CODED && CONFIG_HAS_HW_NRF_RADIO_BLE_CODED */
#endif /* !CONFIG_BT_CTLR_TIFS_HW */ #endif /* !CONFIG_BT_CTLR_TIFS_HW */
return remainder; return remainder;
@ -982,7 +983,7 @@ void *radio_ccm_rx_pkt_set(struct ccm *ccm, u8_t phy, void *pkt)
break; break;
#if defined(CONFIG_BT_CTLR_PHY_CODED) #if defined(CONFIG_BT_CTLR_PHY_CODED)
#if defined(CONFIG_SOC_NRF52840) #if defined(CONFIG_HAS_HW_NRF_RADIO_BLE_CODED)
case BIT(2): case BIT(2):
mode |= (CCM_MODE_DATARATE_125Kbps << mode |= (CCM_MODE_DATARATE_125Kbps <<
CCM_MODE_DATARATE_Pos) & CCM_MODE_DATARATE_Pos) &
@ -997,7 +998,7 @@ void *radio_ccm_rx_pkt_set(struct ccm *ccm, u8_t phy, void *pkt)
hal_radio_nrf_ppi_channels_enable( hal_radio_nrf_ppi_channels_enable(
BIT(HAL_TRIGGER_RATEOVERRIDE_PPI)); BIT(HAL_TRIGGER_RATEOVERRIDE_PPI));
break; break;
#endif /* CONFIG_SOC_NRF52840 */ #endif /* CONFIG_HAS_HW_NRF_RADIO_BLE_CODED */
#endif /* CONFIG_BT_CTLR_PHY_CODED */ #endif /* CONFIG_BT_CTLR_PHY_CODED */
} }
#endif /* CONFIG_SOC_COMPATIBLE_NRF52X */ #endif /* CONFIG_SOC_COMPATIBLE_NRF52X */

14
subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio_nrf5_ppi.h
View file

@ -243,7 +243,7 @@ static inline void hal_trigger_aar_ppi_config(void)
/******************************************************************************* /*******************************************************************************
* Trigger Radio Rate override upon Rateboost event. * Trigger Radio Rate override upon Rateboost event.
*/ */
#if defined(CONFIG_SOC_NRF52840) #if defined(CONFIG_HAS_HW_NRF_RADIO_BLE_CODED)
#define HAL_TRIGGER_RATEOVERRIDE_PPI 13 #define HAL_TRIGGER_RATEOVERRIDE_PPI 13
@ -255,7 +255,7 @@ static inline void hal_trigger_rateoverride_ppi_config(void)
(u32_t)&(NRF_CCM->TASKS_RATEOVERRIDE)); (u32_t)&(NRF_CCM->TASKS_RATEOVERRIDE));
} }
#endif /* CONFIG_SOC_NRF52840 */ #endif /* CONFIG_HAS_HW_NRF_RADIO_BLE_CODED */
/******************************************************************************/ /******************************************************************************/
#if defined(CONFIG_BT_CTLR_GPIO_PA_PIN) || defined(CONFIG_BT_CTLR_GPIO_LNA_PIN) #if defined(CONFIG_BT_CTLR_GPIO_PA_PIN) || defined(CONFIG_BT_CTLR_GPIO_LNA_PIN)
@ -444,7 +444,8 @@ static inline void hal_radio_sw_switch_disable(void)
BIT(HAL_SW_SWITCH_GROUP_TASK_ENABLE_PPI)); BIT(HAL_SW_SWITCH_GROUP_TASK_ENABLE_PPI));
} }
#if defined(CONFIG_BT_CTLR_PHY_CODED) && defined(CONFIG_SOC_NRF52840) #if defined(CONFIG_BT_CTLR_PHY_CODED) && \
defined(CONFIG_HAS_HW_NRF_RADIO_BLE_CODED)
/* The 2 adjacent TIMER EVENTS_COMPARE event offsets used for implementing /* The 2 adjacent TIMER EVENTS_COMPARE event offsets used for implementing
* SW_SWITCH_TIMER-based auto-switch for TIFS, when receiving in LE Coded PHY. * SW_SWITCH_TIMER-based auto-switch for TIFS, when receiving in LE Coded PHY.
* 'index' must be 0 or 1. * 'index' must be 0 or 1.
@ -555,12 +556,13 @@ static inline void hal_radio_group_task_disable_ppi_setup(void)
SW_SWITCH_TIMER_EVTS_COMP(1)), SW_SWITCH_TIMER_EVTS_COMP(1)),
HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_TASK(1)); HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_TASK(1));
} }
#endif /* CONFIG_SOC_NRF52840 */ #endif /* CONFIG_HAS_HW_NRF_RADIO_BLE_CODED */
static inline void hal_radio_sw_switch_ppi_group_setup(void) static inline void hal_radio_sw_switch_ppi_group_setup(void)
{ {
/* Include the appropriate PPI channels in the two PPI Groups. */ /* Include the appropriate PPI channels in the two PPI Groups. */
#if !defined(CONFIG_BT_CTLR_PHY_CODED) || !defined(CONFIG_SOC_NRF52840) #if !defined(CONFIG_BT_CTLR_PHY_CODED) || \
!defined(CONFIG_HAS_HW_NRF_RADIO_BLE_CODED)
NRF_PPI->CHG[SW_SWITCH_TIMER_TASK_GROUP(0)] = NRF_PPI->CHG[SW_SWITCH_TIMER_TASK_GROUP(0)] =
HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_0_INCLUDE | HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_0_INCLUDE |
HAL_SW_SWITCH_RADIO_ENABLE_PPI_0_INCLUDE; HAL_SW_SWITCH_RADIO_ENABLE_PPI_0_INCLUDE;
@ -576,7 +578,7 @@ static inline void hal_radio_sw_switch_ppi_group_setup(void)
HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_1_INCLUDE | HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_1_INCLUDE |
HAL_SW_SWITCH_RADIO_ENABLE_PPI_1_INCLUDE | HAL_SW_SWITCH_RADIO_ENABLE_PPI_1_INCLUDE |
HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_1_INCLUDE; HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_1_INCLUDE;
#endif /* CONFIG_BT_CTLR_PHY_CODED && CONFIG_SOC_NRF52840 */ #endif /* CONFIG_BT_CTLR_PHY_CODED && CONFIG_HAS_HW_NRF_RADIO_BLE_CODED */
} }
#endif /* !CONFIG_BT_CTLR_TIFS_HW */ #endif /* !CONFIG_BT_CTLR_TIFS_HW */