boards: renesas: rzg3s_smarc: Add CAN support

Add CAN support for board RZ/G3S-SMARC

Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>

boards/renesas/rzg3s_smarc/rzg3s_smarc-pinctrl.dtsi

@@ -55,4 +55,18 @@
 			pinmux = <RZG_PINMUX(PORT_13, 4, 7)>; /* GTIOCA */
 		};
 	};
+
+	/omit-if-no-ref/ can0_pins: can0 {
+		can0-pinmux {
+			pinmux = <RZG_PINMUX(PORT_06, 1, 3)>, /* TX */
+				 <RZG_PINMUX(PORT_06, 2, 3)>; /* RX */
+		};
+	};
+
+	/omit-if-no-ref/ can1_pins: can1 {
+		can1-pinmux {
+			pinmux = <RZG_PINMUX(PORT_17, 0, 3)>, /* TX */
+				 <RZG_PINMUX(PORT_17, 1, 3)>; /* RX */
+		};
+	};
 };

boards/renesas/rzg3s_smarc/rzg3s_smarc_r9a08g045s33gbg_cm33.dts

@@ -22,6 +22,7 @@
 		zephyr,flash = &spi_flash;
 		zephyr,console = &scif1;
 		zephyr,shell-uart = &scif1;
+		zephyr,canbus = &canfd0;
 	};
 
 	aliases {
@@ -74,6 +75,19 @@
 		reg = <0x80200000 DT_SIZE_K(256)>;
 	};
 
+	transceiver0: can-phy0 {
+		compatible = "can-transceiver-gpio";
+		standby-gpios = <&gpio13 0 GPIO_ACTIVE_HIGH>;
+		max-bitrate = <8000000>;
+		#phy-cells = <0>;
+	};
+
+	transceiver1: can-phy1 {
+		compatible = "can-transceiver-gpio";
+		standby-gpios = <&gpio13 1 GPIO_ACTIVE_HIGH>;
+		max-bitrate = <8000000>;
+		#phy-cells = <0>;
+	};
 };
 
 &scif1 {
@@ -87,6 +101,10 @@
 	status = "okay";
 };
 
+&gpio13{
+	status = "okay";
+};
+
 &gpio18{
 	status = "okay";
 };
@@ -94,3 +112,15 @@
 &adc {
 	status = "okay";
 };
+
+&canfd_global {
+	status = "okay";
+};
+
+&canfd0 {
+	pinctrl-0 = <&can0_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+	rx-max-filters = <32>;
+	phys = <&transceiver0>;
+};

boards/renesas/rzg3s_smarc/rzg3s_smarc_r9a08g045s33gbg_cm33.yaml

@@ -13,3 +13,4 @@ supported:
   - gpio
   - counter
   - pwm
+  - can