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boards/arm: Enabling SPI ports on nucleo_f030r8

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Current configuration was choosen to avoid colliding with existing ones
for i2c and uart, but others can be used (see
drivers/pinmux/stm32/stm32_f0.h)

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit is contained in:
Tomasz Bursztyka 2018-02-12 11:16:38 +01:00 • committed by Kumar Gala
commit 561161dc0e
3 changed files with 31 additions and 1 deletions
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10
boards/arm/nucleo_f030r8/Kconfig.defconfig
View file

@ -40,4 +40,14 @@ config I2C_2
endif
if SPI
config SPI_1
default y
config SPI_2
default y
endif
endif # BOARD_NUCLEO_F030R8

10
boards/arm/nucleo_f030r8/nucleo_f030r8.dts
View file

@ -5,7 +5,7 @@
*/
/dts-v1/;
#include <st/stm32f030.dtsi>
#include <st/stm32f030X8.dtsi>
/ {
model = "STMicroelectronics STM32F030R8-NUCLEO board";
@ -41,3 +41,11 @@
status = "ok";
clock-frequency = <I2C_BITRATE_FAST>;
};
&spi1 {
status = "ok";
};
&spi2 {
status = "ok";
};

12
boards/arm/nucleo_f030r8/pinmux.c
View file

@ -31,6 +31,18 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA11, STM32F0_PINMUX_FUNC_PA11_I2C2_SCL},
{STM32_PIN_PA12, STM32F0_PINMUX_FUNC_PA12_I2C2_SDA},
#endif /* CONFIG_I2C_2 */
#ifdef CONFIG_SPI_1
{STM32_PIN_PA4, STM32F0_PINMUX_FUNC_PA4_SPI1_NSS},
{STM32_PIN_PA5, STM32F0_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F0_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F0_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif /* CONFIG_SPI_1 */
#ifdef CONFIG_SPI_2
{STM32_PIN_PB12, STM32F0_PINMUX_FUNC_PB12_SPI2_NSS},
{STM32_PIN_PB13, STM32F0_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F0_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F0_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif /* CONFIG_SPI_2 */
};
static int pinmux_stm32_init(struct device *port)