drivers: spi: nrfx_spi/s/m: drop -pin support

SPI/S/M drivers will only use pinctrl now.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit is contained in:
Gerard Marull-Paretas 2023-02-21 13:17:09 +01:00 committed by Marti Bolivar
commit 55ac2f91f6
7 changed files with 18 additions and 168 deletions

View file

@ -28,9 +28,7 @@ struct spi_nrfx_config {
nrfx_spi_t spi;
nrfx_spi_config_t def_config;
void (*irq_connect)(void);
#ifdef CONFIG_PINCTRL
const struct pinctrl_dev_config *pcfg;
#endif
};
static void event_handler(const nrfx_spi_evt_t *p_event, void *p_context);
@ -323,13 +321,11 @@ static int spi_nrfx_pm_action(const struct device *dev,
switch (action) {
case PM_DEVICE_ACTION_RESUME:
#ifdef CONFIG_PINCTRL
ret = pinctrl_apply_state(dev_config->pcfg,
PINCTRL_STATE_DEFAULT);
if (ret < 0) {
return ret;
}
#endif
/* nrfx_spi_init() will be called at configuration before
* the next transfer.
*/
@ -341,13 +337,11 @@ static int spi_nrfx_pm_action(const struct device *dev,
dev_data->initialized = false;
}
#ifdef CONFIG_PINCTRL
ret = pinctrl_apply_state(dev_config->pcfg,
PINCTRL_STATE_SLEEP);
if (ret < 0) {
return ret;
}
#endif
break;
default:
@ -364,12 +358,10 @@ static int spi_nrfx_init(const struct device *dev)
struct spi_nrfx_data *dev_data = dev->data;
int err;
#ifdef CONFIG_PINCTRL
err = pinctrl_apply_state(dev_config->pcfg, PINCTRL_STATE_DEFAULT);
if (err < 0) {
return err;
}
#endif
dev_config->irq_connect();
@ -393,34 +385,8 @@ static int spi_nrfx_init(const struct device *dev)
#define SPI(idx) DT_NODELABEL(spi##idx)
#define SPI_PROP(idx, prop) DT_PROP(SPI(idx), prop)
#define SPI_NRFX_MISO_PULL(idx) \
(SPI_PROP(idx, miso_pull_up) \
? SPI_PROP(idx, miso_pull_down) \
? -1 /* invalid configuration */\
: NRF_GPIO_PIN_PULLUP \
: SPI_PROP(idx, miso_pull_down) \
? NRF_GPIO_PIN_PULLDOWN \
: NRF_GPIO_PIN_NOPULL)
#define SPI_NRFX_SPI_PIN_CFG(idx) \
COND_CODE_1(CONFIG_PINCTRL, \
(.skip_gpio_cfg = true, \
.skip_psel_cfg = true,), \
(.sck_pin = SPI_PROP(idx, sck_pin), \
.mosi_pin = DT_PROP_OR(SPI(idx), mosi_pin, \
NRFX_SPI_PIN_NOT_USED), \
.miso_pin = DT_PROP_OR(SPI(idx), miso_pin, \
NRFX_SPI_PIN_NOT_USED), \
.miso_pull = SPI_NRFX_MISO_PULL(idx),))
#define SPI_NRFX_SPI_DEFINE(idx) \
NRF_DT_CHECK_PIN_ASSIGNMENTS(SPI(idx), 1, \
sck_pin, mosi_pin, miso_pin); \
BUILD_ASSERT(IS_ENABLED(CONFIG_PINCTRL) || \
!(SPI_PROP(idx, miso_pull_up) && \
SPI_PROP(idx, miso_pull_down)), \
"SPI"#idx \
": cannot enable both pull-up and pull-down on MISO line"); \
NRF_DT_CHECK_PIN_ASSIGNMENTS(SPI(idx), 1); \
static void irq_connect##idx(void) \
{ \
IRQ_CONNECT(DT_IRQN(SPI(idx)), DT_IRQ(SPI(idx), priority), \
@ -433,20 +399,20 @@ static int spi_nrfx_init(const struct device *dev)
.dev = DEVICE_DT_GET(SPI(idx)), \
.busy = false, \
}; \
IF_ENABLED(CONFIG_PINCTRL, (PINCTRL_DT_DEFINE(SPI(idx)))); \
PINCTRL_DT_DEFINE(SPI(idx)); \
static const struct spi_nrfx_config spi_##idx##z_config = { \
.spi = { \
.p_reg = (NRF_SPI_Type *)DT_REG_ADDR(SPI(idx)), \
.drv_inst_idx = NRFX_SPI##idx##_INST_IDX, \
}, \
.def_config = { \
SPI_NRFX_SPI_PIN_CFG(idx) \
.skip_gpio_cfg = true, \
.skip_psel_cfg = true, \
.ss_pin = NRFX_SPI_PIN_NOT_USED, \
.orc = SPI_PROP(idx, overrun_character), \
}, \
.irq_connect = irq_connect##idx, \
IF_ENABLED(CONFIG_PINCTRL, \
(.pcfg = PINCTRL_DT_DEV_CONFIG_GET(SPI(idx)),)) \
.pcfg = PINCTRL_DT_DEV_CONFIG_GET(SPI(idx)), \
}; \
PM_DEVICE_DT_DEFINE(SPI(idx), spi_nrfx_pm_action); \
DEVICE_DT_DEFINE(SPI(idx), \

View file

@ -51,9 +51,7 @@ struct spi_nrfx_config {
uint32_t max_freq;
nrfx_spim_config_t def_config;
void (*irq_connect)(void);
#ifdef CONFIG_PINCTRL
const struct pinctrl_dev_config *pcfg;
#endif
#ifdef CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58
bool anomaly_58_workaround;
#endif
@ -492,13 +490,11 @@ static int spim_nrfx_pm_action(const struct device *dev,
switch (action) {
case PM_DEVICE_ACTION_RESUME:
#ifdef CONFIG_PINCTRL
ret = pinctrl_apply_state(dev_config->pcfg,
PINCTRL_STATE_DEFAULT);
if (ret < 0) {
return ret;
}
#endif
/* nrfx_spim_init() will be called at configuration before
* the next transfer.
*/
@ -510,13 +506,11 @@ static int spim_nrfx_pm_action(const struct device *dev,
dev_data->initialized = false;
}
#ifdef CONFIG_PINCTRL
ret = pinctrl_apply_state(dev_config->pcfg,
PINCTRL_STATE_SLEEP);
if (ret < 0) {
return ret;
}
#endif
break;
default:
@ -534,12 +528,10 @@ static int spi_nrfx_init(const struct device *dev)
struct spi_nrfx_data *dev_data = dev->data;
int err;
#ifdef CONFIG_PINCTRL
err = pinctrl_apply_state(dev_config->pcfg, PINCTRL_STATE_DEFAULT);
if (err < 0) {
return err;
}
#endif
dev_config->irq_connect();
@ -566,15 +558,6 @@ static int spi_nrfx_init(const struct device *dev)
#define SPIM_PROP(idx, prop) DT_PROP(SPIM(idx), prop)
#define SPIM_HAS_PROP(idx, prop) DT_NODE_HAS_PROP(SPIM(idx), prop)
#define SPIM_NRFX_MISO_PULL(idx) \
(SPIM_PROP(idx, miso_pull_up) \
? SPIM_PROP(idx, miso_pull_down) \
? -1 /* invalid configuration */\
: NRF_GPIO_PIN_PULLUP \
: SPIM_PROP(idx, miso_pull_down) \
? NRF_GPIO_PIN_PULLDOWN \
: NRF_GPIO_PIN_NOPULL)
#define SPI_NRFX_SPIM_EXTENDED_CONFIG(idx) \
IF_ENABLED(NRFX_SPIM_EXTENDED_ENABLED, \
(.dcx_pin = NRFX_SPIM_PIN_NOT_USED, \
@ -583,25 +566,8 @@ static int spi_nrfx_init(const struct device *dev)
()) \
))
#define SPI_NRFX_SPIM_PIN_CFG(idx) \
COND_CODE_1(CONFIG_PINCTRL, \
(.skip_gpio_cfg = true, \
.skip_psel_cfg = true,), \
(.sck_pin = SPIM_PROP(idx, sck_pin), \
.mosi_pin = DT_PROP_OR(SPIM(idx), mosi_pin, \
NRFX_SPIM_PIN_NOT_USED), \
.miso_pin = DT_PROP_OR(SPIM(idx), miso_pin, \
NRFX_SPIM_PIN_NOT_USED), \
.miso_pull = SPIM_NRFX_MISO_PULL(idx),))
#define SPI_NRFX_SPIM_DEFINE(idx) \
NRF_DT_CHECK_PIN_ASSIGNMENTS(SPIM(idx), 1, \
sck_pin, mosi_pin, miso_pin); \
BUILD_ASSERT(IS_ENABLED(CONFIG_PINCTRL) || \
!(SPIM_PROP(idx, miso_pull_up) && \
SPIM_PROP(idx, miso_pull_down)), \
"SPIM"#idx \
": cannot enable both pull-up and pull-down on MISO line"); \
NRF_DT_CHECK_PIN_ASSIGNMENTS(SPIM(idx), 1); \
static void irq_connect##idx(void) \
{ \
IRQ_CONNECT(DT_IRQN(SPIM(idx)), DT_IRQ(SPIM(idx), priority), \
@ -620,7 +586,7 @@ static int spi_nrfx_init(const struct device *dev)
.dev = DEVICE_DT_GET(SPIM(idx)), \
.busy = false, \
}; \
IF_ENABLED(CONFIG_PINCTRL, (PINCTRL_DT_DEFINE(SPIM(idx)))); \
PINCTRL_DT_DEFINE(SPIM(idx)); \
static const struct spi_nrfx_config spi_##idx##z_config = { \
.spim = { \
.p_reg = (NRF_SPIM_Type *)DT_REG_ADDR(SPIM(idx)), \
@ -628,18 +594,18 @@ static int spi_nrfx_init(const struct device *dev)
}, \
.max_freq = SPIM_PROP(idx, max_frequency), \
.def_config = { \
SPI_NRFX_SPIM_PIN_CFG(idx) \
.skip_gpio_cfg = true, \
.skip_psel_cfg = true, \
.ss_pin = NRFX_SPIM_PIN_NOT_USED, \
.orc = SPIM_PROP(idx, overrun_character), \
SPI_NRFX_SPIM_EXTENDED_CONFIG(idx) \
}, \
.irq_connect = irq_connect##idx, \
.pcfg = PINCTRL_DT_DEV_CONFIG_GET(SPIM(idx)), \
COND_CODE_1(CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58, \
(.anomaly_58_workaround = \
SPIM_PROP(idx, anomaly_58_workaround),), \
()) \
IF_ENABLED(CONFIG_PINCTRL, \
(.pcfg = PINCTRL_DT_DEV_CONFIG_GET(SPIM(idx)),)) \
}; \
PM_DEVICE_DT_DEFINE(SPIM(idx), spim_nrfx_pm_action); \
DEVICE_DT_DEFINE(SPIM(idx), \

View file

@ -23,9 +23,7 @@ struct spi_nrfx_config {
nrfx_spis_t spis;
nrfx_spis_config_t config;
void (*irq_connect)(void);
#ifdef CONFIG_PINCTRL
const struct pinctrl_dev_config *pcfg;
#endif
};
/* Maximum buffer length (depends on the EasyDMA bits, equal for all instances) */
@ -238,15 +236,12 @@ static int spi_nrfx_init(const struct device *dev)
const struct spi_nrfx_config *dev_config = dev->config;
struct spi_nrfx_data *dev_data = dev->data;
nrfx_err_t result;
#ifdef CONFIG_PINCTRL
int err;
err = pinctrl_apply_state(dev_config->pcfg, PINCTRL_STATE_DEFAULT);
if (err < 0) {
return err;
}
#endif
/* This sets only default values of mode and bit order. The ones to be
* actually used are set in configure() when a transfer is prepared.
@ -274,22 +269,8 @@ static int spi_nrfx_init(const struct device *dev)
#define SPIS(idx) DT_NODELABEL(spi##idx)
#define SPIS_PROP(idx, prop) DT_PROP(SPIS(idx), prop)
#define SPI_NRFX_SPIS_PIN_CFG(idx) \
COND_CODE_1(CONFIG_PINCTRL, \
(.skip_gpio_cfg = true, \
.skip_psel_cfg = true,), \
(.sck_pin = SPIS_PROP(idx, sck_pin), \
.mosi_pin = DT_PROP_OR(SPIS(idx), mosi_pin, \
NRFX_SPIS_PIN_NOT_USED), \
.miso_pin = DT_PROP_OR(SPIS(idx), miso_pin, \
NRFX_SPIS_PIN_NOT_USED), \
.csn_pin = SPIS_PROP(idx, csn_pin), \
.csn_pullup = NRF_GPIO_PIN_NOPULL, \
.miso_drive = NRF_GPIO_PIN_S0S1,))
#define SPI_NRFX_SPIS_DEFINE(idx) \
NRF_DT_CHECK_PIN_ASSIGNMENTS(SPIS(idx), 0, \
sck_pin, mosi_pin, miso_pin, csn_pin); \
NRF_DT_CHECK_PIN_ASSIGNMENTS(SPIS(idx), 0); \
static void irq_connect##idx(void) \
{ \
IRQ_CONNECT(DT_IRQN(SPIS(idx)), DT_IRQ(SPIS(idx), priority), \
@ -299,22 +280,22 @@ static int spi_nrfx_init(const struct device *dev)
SPI_CONTEXT_INIT_LOCK(spi_##idx##_data, ctx), \
SPI_CONTEXT_INIT_SYNC(spi_##idx##_data, ctx), \
}; \
IF_ENABLED(CONFIG_PINCTRL, (PINCTRL_DT_DEFINE(SPIS(idx)))); \
PINCTRL_DT_DEFINE(SPIS(idx)); \
static const struct spi_nrfx_config spi_##idx##z_config = { \
.spis = { \
.p_reg = (NRF_SPIS_Type *)DT_REG_ADDR(SPIS(idx)), \
.drv_inst_idx = NRFX_SPIS##idx##_INST_IDX, \
}, \
.config = { \
SPI_NRFX_SPIS_PIN_CFG(idx) \
.skip_gpio_cfg = true, \
.skip_psel_cfg = true, \
.mode = NRF_SPIS_MODE_0, \
.bit_order = NRF_SPIS_BIT_ORDER_MSB_FIRST, \
.orc = SPIS_PROP(idx, overrun_character), \
.def = SPIS_PROP(idx, def_char), \
}, \
.irq_connect = irq_connect##idx, \
IF_ENABLED(CONFIG_PINCTRL, \
(.pcfg = PINCTRL_DT_DEV_CONFIG_GET(SPIS(idx)),)) \
.pcfg = PINCTRL_DT_DEV_CONFIG_GET(SPIS(idx)), \
}; \
DEVICE_DT_DEFINE(SPIS(idx), \
spi_nrfx_init, \

View file

@ -12,6 +12,9 @@ properties:
interrupts:
required: true
pinctrl-0:
required: true
max-frequency:
type: int
required: true
@ -26,42 +29,3 @@ properties:
The overrun character (ORC) is used when all bytes from the TX buffer
are sent, but the transfer continues due to RX. Defaults to 0xff
(line high), the most common value used in SPI transfers.
sck-pin:
type: int
deprecated: true
description: |
IMPORTANT: This option will only be used if the new pin control driver
is not enabled.
The SCK pin to use.
For pins P0.0 through P0.31, use the pin number. For example,
to use P0.16 for SCK, set:
sck-pin = <16>;
For pins P1.0 through P1.31, add 32 to the pin number. For
example, to use P1.2 for SCK, set:
sck-pin = <34>; /* 32 + 2 */
mosi-pin:
type: int
deprecated: true
description: |
IMPORTANT: This option will only be used if the new pin control driver
is not enabled.
The MOSI pin to use. The pin numbering scheme is the same as
the sck-pin property's.
miso-pin:
type: int
deprecated: true
description: |
IMPORTANT: This option will only be used if the new pin control driver
is not enabled.
The MISO pin to use. The pin numbering scheme is the same as
the sck-pin property's.

View file

@ -6,12 +6,3 @@ description: Nordic nRF family SPI (SPI master)
compatible: "nordic,nrf-spi"
include: nordic,nrf-spi-common.yaml
properties:
miso-pull-up:
type: boolean
description: Enable pull-up on MISO line
miso-pull-down:
type: boolean
description: Enable pull-down on MISO line

View file

@ -8,14 +8,6 @@ compatible: "nordic,nrf-spim"
include: ["nordic,nrf-spi-common.yaml", "memory-region.yaml"]
properties:
miso-pull-up:
type: boolean
description: Enable pull-up on MISO line
miso-pull-down:
type: boolean
description: Enable pull-down on MISO line
anomaly-58-workaround:
type: boolean
description: |

View file

@ -8,16 +8,6 @@ compatible: "nordic,nrf-spis"
include: nordic,nrf-spi-common.yaml
properties:
csn-pin:
type: int
deprecated: true
description: |
IMPORTANT: This option will only be used if the new pin control driver
is not enabled.
The CSN pin to use. The pin numbering scheme is the same as
the sck-pin property's.
def-char:
type: int
required: true