include/devicetree: dma: rename DMAS CELL macros

The macros should have been DMAS_CELL_ not DMAS_CELLS_ as this matches
the other devicetree macro naming convention.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2020-04-20 16:06:21 -05:00 committed by Kumar Gala
commit 5419a196b1
3 changed files with 26 additions and 26 deletions

View file

@ -853,26 +853,26 @@ static struct device *get_dev_from_tx_dma_channel(u32_t dma_channel)
.dir = { \ .dir = { \
.dma_name = DT_DMAS_LABEL_BY_NAME(DT_NODELABEL(i2s##index), dir),\ .dma_name = DT_DMAS_LABEL_BY_NAME(DT_NODELABEL(i2s##index), dir),\
.dma_channel = \ .dma_channel = \
DT_DMAS_CELLS_BY_NAME(DT_NODELABEL(i2s##index), dir, channel),\ DT_DMAS_CELL_BY_NAME(DT_NODELABEL(i2s##index), dir, channel),\
.dma_cfg = { \ .dma_cfg = { \
.block_count = 2, \ .block_count = 2, \
.dma_slot = \ .dma_slot = \
DT_DMAS_CELLS_BY_NAME(DT_NODELABEL(i2s##index), dir, slot),\ DT_DMAS_CELL_BY_NAME(DT_NODELABEL(i2s##index), dir, slot),\
.channel_direction = src_dev##_TO_##dest_dev, \ .channel_direction = src_dev##_TO_##dest_dev, \
.source_data_size = 2, /* 16bit default */ \ .source_data_size = 2, /* 16bit default */ \
.dest_data_size = 2, /* 16bit default */ \ .dest_data_size = 2, /* 16bit default */ \
.source_burst_length = 0, /* SINGLE transfer */ \ .source_burst_length = 0, /* SINGLE transfer */ \
.dest_burst_length = 1, \ .dest_burst_length = 1, \
.channel_priority = STM32_DMA_CONFIG_PRIORITY( \ .channel_priority = STM32_DMA_CONFIG_PRIORITY( \
DT_DMAS_CELLS_BY_NAME(DT_NODELABEL(i2s##index), dir, channel_config)),\ DT_DMAS_CELL_BY_NAME(DT_NODELABEL(i2s##index), dir, channel_config)),\
.dma_callback = dma_##dir##_callback, \ .dma_callback = dma_##dir##_callback, \
}, \ }, \
.src_addr_increment = STM32_DMA_CONFIG_##src_dev##_ADDR_INC( \ .src_addr_increment = STM32_DMA_CONFIG_##src_dev##_ADDR_INC( \
DT_DMAS_CELLS_BY_NAME(DT_NODELABEL(i2s##index), dir, channel_config)),\ DT_DMAS_CELL_BY_NAME(DT_NODELABEL(i2s##index), dir, channel_config)),\
.dst_addr_increment = STM32_DMA_CONFIG_##dest_dev##_ADDR_INC( \ .dst_addr_increment = STM32_DMA_CONFIG_##dest_dev##_ADDR_INC( \
DT_DMAS_CELLS_BY_NAME(DT_NODELABEL(i2s##index), dir, channel_config)),\ DT_DMAS_CELL_BY_NAME(DT_NODELABEL(i2s##index), dir, channel_config)),\
.fifo_threshold = STM32_DMA_FEATURES_FIFO_THRESHOLD( \ .fifo_threshold = STM32_DMA_FEATURES_FIFO_THRESHOLD( \
DT_DMAS_CELLS_BY_NAME(DT_NODELABEL(i2s##index), dir, channel_config)),\ DT_DMAS_CELL_BY_NAME(DT_NODELABEL(i2s##index), dir, channel_config)),\
.stream_start = dir##_stream_start, \ .stream_start = dir##_stream_start, \
.stream_disable = dir##_stream_disable, \ .stream_disable = dir##_stream_disable, \
.queue_drop = dir##_queue_drop, \ .queue_drop = dir##_queue_drop, \

View file

@ -136,8 +136,8 @@ extern "C" {
* *
* Example usage: * Example usage:
* *
* DT_DMAS_CELLS_BY_IDX(DT_NODELABEL(n), channel, 0) // 1 * DT_DMAS_CELL_BY_IDX(DT_NODELABEL(n), channel, 0) // 1
* DT_DMAS_CELLS_BY_IDX(DT_NODELABEL(n), config, 1) // 0x404 * DT_DMAS_CELL_BY_IDX(DT_NODELABEL(n), config, 1) // 0x404
* *
* @param node_id node identifier * @param node_id node identifier
* @param cell_name binding's cell name within the specifier at index idx * @param cell_name binding's cell name within the specifier at index idx
@ -145,18 +145,18 @@ extern "C" {
* @return the value of "cell" inside the dma channel specifier * @return the value of "cell" inside the dma channel specifier
*/ */
#define DT_DMAS_CELLS_BY_IDX(node_id, cell_name, idx) \ #define DT_DMAS_CELL_BY_IDX(node_id, cell_name, idx) \
DT_PHA_BY_IDX(node_id, dmas, cell_name, idx) DT_PHA_BY_IDX(node_id, dmas, cell_name, idx)
/** /**
* @brief Get dma channel specifier cell value at an index * @brief Get dma channel specifier cell value at an index
* (see @ref DT_DMAS_CELLS_BY_IDX) * (see @ref DT_DMAS_CELL_BY_IDX)
* @param inst instance number * @param inst instance number
* @param cell_name binding's cell name within the specifier at index idx * @param cell_name binding's cell name within the specifier at index idx
* @param idx logical index into the "dmas" property * @param idx logical index into the "dmas" property
* @return the value of "cell" inside the dma channel specifier * @return the value of "cell" inside the dma channel specifier
*/ */
#define DT_INST_DMAS_CELLS_BY_IDX(inst, cell_name, idx) \ #define DT_INST_DMAS_CELL_BY_IDX(inst, cell_name, idx) \
DT_PHA_BY_IDX(DT_DRV_INST(inst), dmas, cell_name, idx) DT_PHA_BY_IDX(DT_DRV_INST(inst), dmas, cell_name, idx)
/** /**
@ -186,8 +186,8 @@ extern "C" {
* *
* Example usage: * Example usage:
* *
* DT_DMAS_CELLS_BY_NAME(DT_NODELABEL(n), channel, tx) // 1 * DT_DMAS_CELL_BY_NAME(DT_NODELABEL(n), channel, tx) // 1
* DT_DMAS_CELLS_BY_NAME(DT_NODELABEL(n), config, rx) // 0x404 * DT_DMAS_CELL_BY_NAME(DT_NODELABEL(n), config, rx) // 0x404
* *
* @param node_id node identifier * @param node_id node identifier
* @param cell_name binding's cell name within the specifier referenced * @param cell_name binding's cell name within the specifier referenced
@ -197,20 +197,20 @@ extern "C" {
* @see DT_PHA_PHANDLE_IDX() * @see DT_PHA_PHANDLE_IDX()
*/ */
#define DT_DMAS_CELLS_BY_NAME(node_id, cell_name, name) \ #define DT_DMAS_CELL_BY_NAME(node_id, cell_name, name) \
DT_PHA_BY_NAME(node_id, dmas, cell_name, name) DT_PHA_BY_NAME(node_id, dmas, cell_name, name)
/** /**
* @brief Get dma channel specifier cell value by name * @brief Get dma channel specifier cell value by name
* (see @ref DT_DMAS_CELLS_BY_NAME) * (see @ref DT_DMAS_CELL_BY_NAME)
* @param inst instance number * @param inst instance number
* @param name lowercase-and-underscores dma channel specifier name
* @param cell_name binding's cell name within the specifier referenced * @param cell_name binding's cell name within the specifier referenced
* as "name" * as "name"
* @param name lowercase-and-underscores dma channel specifier name
* @return the value of "cell" inside the specifier * @return the value of "cell" inside the specifier
*/ */
#define DT_INST_DMAS_CELLS_BY_NAME(inst, cell_name, name) \ #define DT_INST_DMAS_CELL_BY_NAME(inst, cell_name, name) \
DT_DMAS_CELLS_BY_NAME(DT_DRV_INST(inst), cell_name, name) DT_DMAS_CELL_BY_NAME(DT_DRV_INST(inst), cell_name, name)
/** /**
* @brief Does a DMA client have a channel specifier at an index? * @brief Does a DMA client have a channel specifier at an index?

View file

@ -911,22 +911,22 @@ static void test_dma(void)
"TEST_DMA_CTRL_1"), "TEST_DMA_CTRL_1"),
"dma-controller label channel idx 0"); "dma-controller label channel idx 0");
zassert_equal(DT_DMAS_CELLS_BY_NAME(TEST_TEMP, rx, channel), 3, zassert_equal(DT_DMAS_CELL_BY_NAME(TEST_TEMP, rx, channel), 3,
"channel cell of rx dma channel"); "channel cell of rx dma channel");
zassert_equal(DT_INST_DMAS_CELLS_BY_NAME(0, rx, channel), 3, zassert_equal(DT_INST_DMAS_CELL_BY_NAME(0, rx, channel), 3,
"channel cell of rx dma channel"); "channel cell of rx dma channel");
zassert_equal(DT_DMAS_CELLS_BY_NAME(TEST_TEMP, rx, slot), 4, zassert_equal(DT_DMAS_CELL_BY_NAME(TEST_TEMP, rx, slot), 4,
"slot cell of rx dma channel"); "slot cell of rx dma channel");
zassert_equal(DT_INST_DMAS_CELLS_BY_NAME(0, rx, slot), 4, zassert_equal(DT_INST_DMAS_CELL_BY_NAME(0, rx, slot), 4,
"slot cell of rx dma channel"); "slot cell of rx dma channel");
zassert_equal(DT_DMAS_CELLS_BY_IDX(TEST_TEMP, 1, channel), 3, zassert_equal(DT_DMAS_CELL_BY_IDX(TEST_TEMP, 1, channel), 3,
"channel cell of idx 1 dma channel"); "channel cell of idx 1 dma channel");
zassert_equal(DT_INST_DMAS_CELLS_BY_IDX(0, 1, channel), 3, zassert_equal(DT_INST_DMAS_CELL_BY_IDX(0, 1, channel), 3,
"channel cell of idx 1 dma channel"); "channel cell of idx 1 dma channel");
zassert_equal(DT_DMAS_CELLS_BY_IDX(TEST_TEMP, 1, slot), 4, zassert_equal(DT_DMAS_CELL_BY_IDX(TEST_TEMP, 1, slot), 4,
"slot cell of idx 1 dma channel"); "slot cell of idx 1 dma channel");
zassert_equal(DT_INST_DMAS_CELLS_BY_IDX(0, 1, slot), 4, zassert_equal(DT_INST_DMAS_CELL_BY_IDX(0, 1, slot), 4,
"slot cell of idx 1 dma channel"); "slot cell of idx 1 dma channel");
zassert_true(DT_DMAS_HAS_NAME(TEST_TEMP, tx), zassert_true(DT_DMAS_HAS_NAME(TEST_TEMP, tx),