board: Added board support package for Nucleo_F446ZE
Includes support for USB, CAN, ADC, DAC, and Arduino GPIO Map. Future could support: ETM Trace (if Zephyr supports it), QSPI, FMC, DCMI Initially based on closest BSP for the same SoC: nucleo_f446re Extra peripherals added based on closest BSP for nucleo-144 board: nucleo_f429zi Checked against nucleo-144 schematic Documentation updated as best as I could Arduino compatible pinmux for SPI, UART and I2C via Zio header Tested: USB Device mode (samples/subsys/usb/console) Console via ST-link usart3 (samples/hello_world) user LEDs (samples/basic/blinky) scripts/twister --device-tests -p nucleo_f446ze Not tested but should work: SPI, I2C, CAN, ADC, DAC Not working yet: Quad-SPI (missing in dts/arm/st/f4/stm32f4.dtsi) Signed-off-by: Tom Owen <tom.owen@zepler.net>
This commit is contained in:
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8
boards/arm/nucleo_f446ze/Kconfig.board
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8
boards/arm/nucleo_f446ze/Kconfig.board
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# STM32F446ZE Nucleo board configuration
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# Copyright (c) 2021 Tom Owen
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_NUCLEO_F446ZE
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bool "Nucleo F446ZE Development Board"
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depends on SOC_STM32F446XX
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15
boards/arm/nucleo_f446ze/Kconfig.defconfig
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boards/arm/nucleo_f446ze/Kconfig.defconfig
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# STM32F446ZE Nucleo board configuration
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# Copyright (c) 2021 Tom Owen
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_NUCLEO_F446ZE
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config BOARD
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default "nucleo_f446ze"
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config SPI_STM32_INTERRUPT
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default y
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depends on SPI
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endif # BOARD_NUCLEO_F446ZE
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40
boards/arm/nucleo_f446ze/arduino_r3_connector.dtsi
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boards/arm/nucleo_f446ze/arduino_r3_connector.dtsi
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/*
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* Copyright (c) 2021, Tom Owen
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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arduino_header: connector {
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compatible = "arduino-header-r3";
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#gpio-cells = <2>;
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gpio-map-mask = <0xffffffff 0xffffffc0>;
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gpio-map-pass-thru = <0 0x3f>;
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gpio-map = <0 0 &gpioa 3 0>, /* A0 */
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<1 0 &gpioc 0 0>, /* A1 */
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<2 0 &gpioc 3 0>, /* A2 */
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<3 0 &gpiof 3 0>, /* A3 */
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<4 0 &gpiof 5 0>, /* A4 */
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<5 0 &gpiof 10 0>, /* A5 */
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<6 0 &gpiog 9 0>, /* D0 */
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<7 0 &gpiog 14 0>, /* D1 */
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<8 0 &gpiof 15 0>, /* D2 */
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<9 0 &gpioe 13 0>, /* D3 */
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<10 0 &gpiof 14 0>, /* D4 */
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<11 0 &gpioe 11 0>, /* D5 */
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<12 0 &gpioe 9 0>, /* D6 */
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<13 0 &gpiof 13 0>, /* D7 */
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<14 0 &gpiof 12 0>, /* D8 */
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<15 0 &gpiod 15 0>, /* D9 */
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<16 0 &gpiod 14 0>, /* D10 */
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<17 0 &gpioa 7 0>, /* D11 */
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<18 0 &gpioa 6 0>, /* D12 */
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<19 0 &gpioa 5 0>, /* D13 */
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<20 0 &gpiob 9 0>, /* D14 */
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<21 0 &gpiob 8 0>; /* D15 */
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};
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};
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arduino_i2c: &i2c1 {};
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arduino_spi: &spi1 {};
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arduino_serial: &usart6 {};
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6
boards/arm/nucleo_f446ze/board.cmake
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boards/arm/nucleo_f446ze/board.cmake
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# SPDX-License-Identifier: Apache-2.0
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board_runner_args(jlink "--device=STM32F446ZE" "--speed=4000")
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
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BIN
boards/arm/nucleo_f446ze/doc/img/nucleo_f446ze.jpg
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boards/arm/nucleo_f446ze/doc/img/nucleo_f446ze.jpg
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boards/arm/nucleo_f446ze/doc/index.rst
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boards/arm/nucleo_f446ze/doc/index.rst
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.. _nucleo_f446ze_board:
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ST Nucleo F446ZE
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################
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Overview
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********
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The Nucleo F446ZE board features an ARM Cortex-M4 based STM32F446ZE MCU
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with a wide range of connectivity support and configurations. Here are
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some highlights of the Nucleo F446ZE board:
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- STM32F446 microcontroller in QFP144 package
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- Two types of extension resources:
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- ST zio support for Arduino™ Uno V3 connectivity (A0 to A5, D0 to D15) and additional signals exposing a wide range of peripherals
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- ST morpho extension pin headers for full access to all STM32 I/Os
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- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
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- USB re-enumeration capability. Three different interfaces supported on USB:
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- Virtual Com port
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- Mass storage (USB Disk drive) for drag'n'drop programming
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- Debug port
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- Flexible board power supply:
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- USB VBUS or external source(3.3V, 5V, 7 - 12V)
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- Power management access point
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- USB OTG
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- Three LEDs: USB communication (LD1), user LED (LD2), power LED (LD3)
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- Two push-buttons: USER and RESET
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.. image:: img/nucleo_f446ze.jpg
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:width: 720px
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:align: center
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:height: 720px
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:alt: Nucleo F446ZE
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More information about the board can be found at the `Nucleo F446ZE website`_.
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Hardware
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********
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Nucleo F446ZE provides the following hardware components:
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- STM32F446ZET6 in LQFP144 package
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- ARM |reg| 32-bit Cortex |reg|-M4 CPU with FPU
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- Adaptive real-time accelerator (ART Accelerator)
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- 180 MHz max CPU frequency
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- VDD from 1.7 V to 3.6 V
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- 512 KB Flash
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- 128 KB SRAM
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- 10 General purpose timers
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- 2 Advanced control timers
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- 2 basic timers
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- SPI(4)
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- I2C(4)
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- USART(4)
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- UART(2)
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- USB OTG Full Speed and High Speed
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- CAN(2)
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- SAI(2)
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- SPDIF_Rx(1)
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- HDMI_CEC(1)
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- Quad SPI(1)
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- Camera Interface
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- GPIO(50) with external interrupt capability
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- 12-bit ADC(3) with 16 channels
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- 12-bit DAC with 2 channels
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More information about STM32F446ZE can be found here:
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- `STM32F446ZE on www.st.com`_
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- `STM32F446 reference manual`_
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Supported Features
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==================
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The Zephyr nucleo_f446ze board configuration supports the following hardware features:
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+-------------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+=============+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-------------+------------+-------------------------------------+
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| UART | on-chip | serial port |
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+-------------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+-------------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-------------+------------+-------------------------------------+
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| PWM | on-chip | pwm |
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+-------------+------------+-------------------------------------+
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| I2C | on-chip | i2c |
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+-------------+------------+-------------------------------------+
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| USB | on-chip | usb |
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+-------------+------------+-------------------------------------+
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| Backup SRAM | on-chip | Backup SRAM |
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+-------------+------------+-------------------------------------+
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| CAN 1/2 | on-chip | Controller Area Network |
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+-------------+------------+-------------------------------------+
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| ADC | on-chip | Analog Input |
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+-------------+------------+-------------------------------------+
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| DAC | on-chip | Analog Output |
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+-------------+------------+-------------------------------------+
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Other hardware features are not yet supported on this Zephyr port.
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The default configuration can be found in the defconfig file:
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``boards/arm/nucleo_f446ze/nucleo_f446ze_defconfig``
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Connections and IOs
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===================
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Nucleo F446ZE Board has 8 GPIO controllers. These controllers are responsible for pin muxing,
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input/output, pull-up, etc.
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Available pins:
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---------------
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.. image:: img/nucleo_f446ze_zio_left_2019_8_29.png
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:width: 720px
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:align: center
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:height: 540px
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:alt: Nucleo F446ZE Zio/Arduino connectors (left)
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.. image:: img/nucleo_f446ze_zio_right_2019_8_29.png
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:width: 720px
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:align: center
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:height: 540px
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:alt: Nucleo F446ZE Zio/Arduino connectors (right)
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.. image:: img/nucleo_f446ze_morpho_left_2019_8_29.png
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:width: 720px
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:align: center
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:height: 540px
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:alt: Nucleo F446ZE Morpho connectors (left)
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.. image:: img/nucleo_f446ze_morpho_right_2019_8_29.png
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:width: 720px
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:align: center
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:height: 540px
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:alt: Nucleo F446ZE Morpho connectors (right)
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For mode details please refer to `STM32 Nucleo-144 board User Manual`_.
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Default Zephyr Peripheral Mapping:
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----------------------------------
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- UART_2_TX : PD5
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- UART_2_RX : PD6
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- UART_3_TX : PD8
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- UART_3_RX : PD9
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- USER_PB : PC13
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- LD0 : PB0
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- LD1 : PB7
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- LD2 : PB14
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- I2C1_SDA : PB9
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- I2C1_SCL : PB8
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- I2C2_SDA : PF0
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- I2C2_SCL : PF1
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- SPI1_CS : PD14
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- SPI1_SCK : PA5
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- SPI1_MISO : PA6
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- SPI1_MOSI : PA7
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- SPI2_NSS : PB12
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- SPI2_SCK : PB13
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- SPI2_MISO : PB14
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- SPI2_MOSI : PB15
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- CAN1_RX : PD0
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- CAN1_TX : PD1
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- USB_DP : PA11
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- USB_DM : PA12
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- ADC1_IN0 : PA0
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- DAC_OUT1 : PA4
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System Clock
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------------
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Nucleo F446ZE System Clock could be driven by an internal or external oscillator,
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as well as the main PLL clock. By default, the System clock is driven by the PLL clock at 84MHz,
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driven by an 8MHz high-speed external clock.
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Serial Port
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-----------
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Nucleo F446ZE board has 2 UARTs and 4 USARTs. The Zephyr console output is assigned to USART3.
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Default settings are 115200 8N1.
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Backup SRAM
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-----------
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In order to test backup SRAM you may want to disconnect VBAT from VDD. You can
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do it by removing ``SB156`` jumper on the back side of the board.
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Controller Area Network
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-----------------------
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The TX/RX wires are connected with pins 25/27 of CN9 connector.
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Programming and Debugging
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*************************
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Applications for the ``nucleo_f446ze`` board configuration can be built and
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flashed in the usual way (see :ref:`build_an_application` and
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:ref:`application_run` for more details).
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Flashing
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========
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Nucleo F446ZE board includes an ST-LINK/V2-1 embedded debug tool interface.
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This interface is supported by the openocd version included in the Zephyr SDK.
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Flashing an application to Nucleo F446ZE
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----------------------------------------
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Here is an example for the :ref:`hello_world` application.
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Run a serial host program to connect with your Nucleo board.
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.. code-block:: console
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$ minicom -b 115200 -D /dev/ttyACM0
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Build and flash the application:
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: nucleo_f446ze
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:goals: build flash
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You should see the following message on the console:
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.. code-block:: console
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$ Hello World! arm
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Debugging
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=========
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You can debug an application in the usual way. Here is an example for the
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:ref:`hello_world` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: nucleo_f446ze
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:maybe-skip-config:
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:goals: debug
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.. _Nucleo F446ZE website:
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http://www.st.com/en/evaluation-tools/nucleo-f446ze.html
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.. _STM32 Nucleo-144 board User Manual:
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https://www.st.com/resource/en/user_manual/um1974-stm32-nucleo144-boards-mb1137-stmicroelectronics.pdf
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.. _STM32F446ZE on www.st.com:
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http://www.st.com/en/microcontrollers/stm32f446ze.html
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.. _STM32F446 reference manual:
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http://www.st.com/resource/en/reference_manual/dm00135183.pdf
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boards/arm/nucleo_f446ze/nucleo_f446ze.dts
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boards/arm/nucleo_f446ze/nucleo_f446ze.dts
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/*
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* Copyright (c) 2021 Tom Owen
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <st/f4/stm32f446Xe.dtsi>
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#include <st/f4/stm32f446z(c-e)tx-pinctrl.dtsi>
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#include "arduino_r3_connector.dtsi"
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/ {
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model = "STMicroelectronics STM32F446ZE-NUCLEO board";
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compatible = "st,stm32f446ze-nucleo";
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chosen {
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zephyr,console = &usart3;
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zephyr,shell-uart = &usart3;
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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zephyr,can-primary = &can1;
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};
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leds {
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compatible = "gpio-leds";
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green_led_1: led_1 {
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gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>;
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label = "User LD1";
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};
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blue_led_2: led_2 {
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gpios = <&gpiob 7 GPIO_ACTIVE_HIGH>;
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label = "User LD2";
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};
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red_led_3: led_3 {
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gpios = <&gpiob 14 GPIO_ACTIVE_HIGH>;
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label = "User LD3";
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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user_button: button {
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label = "User";
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gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
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};
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};
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aliases {
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led0 = &green_led_1;
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led1 = &blue_led_2;
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led2 = &red_led_3;
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sw0 = &user_button;
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};
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};
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&clk_hse {
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hse-bypass;
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clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
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status = "okay";
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};
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&pll {
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div-m = <8>;
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mul-n = <336>;
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div-p = <2>;
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div-q = <7>;
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clocks = <&clk_hse>;
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status = "okay";
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};
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&rcc {
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clocks = <&pll>;
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clock-frequency = <DT_FREQ_M(168)>; /* highest value to get a precise USB clock */
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ahb-prescaler = <1>;
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apb1-prescaler = <4>;
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apb2-prescaler = <2>;
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};
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&adc1 {
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pinctrl-0 = <&adc1_in0_pa0>;
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status = "okay";
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};
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&dac1 {
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status = "okay";
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pinctrl-0 = <&dac_out1_pa4>;
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};
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&usart2 {
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pinctrl-0 = <&usart2_tx_pd5 &usart2_rx_pd6>;
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current-speed = <115200>;
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status = "okay";
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};
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&usart3 {
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pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
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current-speed = <115200>;
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status = "okay";
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};
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&usart6 {
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pinctrl-0 = <&usart6_tx_pg14 &usart6_rx_pg9>;
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current-speed = <115200>;
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status = "okay";
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};
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&i2c1 {
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pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
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status = "okay";
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clock-frequency = <I2C_BITRATE_FAST>;
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};
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&i2c2 {
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pinctrl-0 = <&i2c2_scl_pf1 &i2c2_sda_pf0>;
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||||
status = "okay";
|
||||
clock-frequency = <I2C_BITRATE_FAST>;
|
||||
};
|
||||
|
||||
|
||||
&spi1 {
|
||||
pinctrl-0 = <&spi1_sck_pa5
|
||||
&spi1_miso_pa6 &spi1_mosi_pa7>;
|
||||
cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi2 {
|
||||
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
|
||||
&spi2_miso_pb14 &spi2_mosi_pb15>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* QSPI not supported until PR #37297 is merged
|
||||
* &quadspi {
|
||||
* pinctrl-0 = <&quadspi_clk_pb2 &quadspi_bk1_ncs_pb6
|
||||
* &quadspi_bk1_io0_pd11 &quadspi_bk1_io1_pd12
|
||||
* &quadspi_bk1_io2_pe2 &quadspi_bk1_io3_pd13>;
|
||||
* status = "disabled";
|
||||
*};
|
||||
*/
|
||||
|
||||
&usbotg_fs {
|
||||
pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12
|
||||
&usb_otg_fs_id_pa10>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
&timers1 {
|
||||
status = "okay";
|
||||
|
||||
pwm1: pwm {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&tim1_ch1_pe9>;
|
||||
};
|
||||
};
|
||||
|
||||
&rtc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&backup_sram {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&can1 {
|
||||
pinctrl-0 = <&can1_rx_pd0 &can1_tx_pd1>;
|
||||
bus-speed = <125000>;
|
||||
sjw = <1>;
|
||||
prop-seg = <0>;
|
||||
phase-seg1 = <6>;
|
||||
phase-seg2 = <5>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&flash0 {
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
boot_partition: partition@0 {
|
||||
label = "mcuboot";
|
||||
reg = <0x00000000 0x00010000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
/*
|
||||
* The flash starting at 0x00010000 and ending at
|
||||
* 0x0001ffff (sectors 16-31) is reserved for use
|
||||
* by the application.
|
||||
*/
|
||||
storage_partition: partition@10000 {
|
||||
label = "storage";
|
||||
reg = <0x00010000 0x00010000>;
|
||||
};
|
||||
|
||||
slot0_partition: partition@20000 {
|
||||
label = "image-0";
|
||||
reg = <0x00020000 0x00020000>;
|
||||
};
|
||||
slot1_partition: partition@40000 {
|
||||
label = "image-1";
|
||||
reg = <0x00040000 0x00020000>;
|
||||
};
|
||||
scratch_partition: partition@60000 {
|
||||
label = "image-scratch";
|
||||
reg = <0x00060000 0x00020000>;
|
||||
};
|
||||
};
|
||||
};
|
22
boards/arm/nucleo_f446ze/nucleo_f446ze.yaml
Normal file
22
boards/arm/nucleo_f446ze/nucleo_f446ze.yaml
Normal file
|
@ -0,0 +1,22 @@
|
|||
identifier: nucleo_f446ze
|
||||
name: ST Nucleo F446ZE
|
||||
type: mcu
|
||||
arch: arm
|
||||
toolchain:
|
||||
- zephyr
|
||||
- gnuarmemb
|
||||
- xtools
|
||||
supported:
|
||||
- arduino_gpio
|
||||
- arduino_i2c
|
||||
- arduino_spi
|
||||
- counter
|
||||
- gpio
|
||||
- spi
|
||||
- i2c
|
||||
- can
|
||||
- backup_sram
|
||||
- usb
|
||||
- quadspi
|
||||
ram: 128
|
||||
flash: 512
|
25
boards/arm/nucleo_f446ze/nucleo_f446ze_defconfig
Normal file
25
boards/arm/nucleo_f446ze/nucleo_f446ze_defconfig
Normal file
|
@ -0,0 +1,25 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
CONFIG_SOC_SERIES_STM32F4X=y
|
||||
CONFIG_SOC_STM32F446XX=y
|
||||
|
||||
# Enable MPU
|
||||
CONFIG_ARM_MPU=y
|
||||
|
||||
# Enable HW stack protection
|
||||
CONFIG_HW_STACK_PROTECTION=y
|
||||
|
||||
CONFIG_SERIAL=y
|
||||
|
||||
# console
|
||||
CONFIG_CONSOLE=y
|
||||
CONFIG_UART_CONSOLE=y
|
||||
|
||||
# enable pinmux
|
||||
CONFIG_PINMUX=y
|
||||
|
||||
# enable GPIO
|
||||
CONFIG_GPIO=y
|
||||
|
||||
# Enable Clocks
|
||||
CONFIG_CLOCK_CONTROL=y
|
12
boards/arm/nucleo_f446ze/support/openocd.cfg
Normal file
12
boards/arm/nucleo_f446ze/support/openocd.cfg
Normal file
|
@ -0,0 +1,12 @@
|
|||
source [find board/st_nucleo_f4.cfg]
|
||||
|
||||
$_TARGETNAME configure -event gdb-attach {
|
||||
echo "Debugger attaching: halting execution"
|
||||
reset halt
|
||||
gdb_breakpoint_override hard
|
||||
}
|
||||
|
||||
$_TARGETNAME configure -event gdb-detach {
|
||||
echo "Debugger detaching: resuming execution"
|
||||
resume
|
||||
}
|
Loading…
Add table
Add a link
Reference in a new issue