arch/x86: Use dts to set gpio options for quark_se and quark_d2000

Get the name and irq flags generated through dts as well.
Fix Kconfig for the gpio driver accordingly.

Irq priority is not set by dts for D2000 as it's irq controller does
not support it.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit is contained in:
Tomasz Bursztyka 2018-03-02 22:30:42 +01:00 committed by Anas Nashif
commit 53f91976b1
7 changed files with 26 additions and 15 deletions

View file

@ -16,3 +16,7 @@
#define CONFIG_I2C_0_NAME INTEL_QMSI_I2C_B0002800_LABEL
#define CONFIG_I2C_0_BITRATE INTEL_QMSI_I2C_B0002800_CLOCK_FREQUENCY
#define CONFIG_GPIO_QMSI_0_NAME INTEL_QMSI_GPIO_B0000C00_LABEL
#define CONFIG_GPIO_QMSI_0_IRQ INTEL_QMSI_GPIO_B0000C00_IRQ_0
#define CONFIG_GPIO_QMSI_0_IRQ_FLAGS INTEL_QMSI_GPIO_B0000C00_IRQ_0_SENSE

View file

@ -51,13 +51,8 @@ config GPIO_QMSI
config GPIO_QMSI_0
def_bool y
config GPIO_QMSI_0_IRQ_PRI
default 2
config GPIO_QMSI_1
def_bool y
config GPIO_QMSI_1_IRQ_PRI
default 2
endif # GPIO
if I2C

View file

@ -23,4 +23,13 @@
#define CONFIG_I2C_1_NAME INTEL_QMSI_I2C_B0002C00_LABEL
#define CONFIG_I2C_1_BITRATE INTEL_QMSI_I2C_B0002C00_CLOCK_FREQUENCY
#define CONFIG_GPIO_QMSI_0_NAME INTEL_QMSI_GPIO_B0000C00_LABEL
#define CONFIG_GPIO_QMSI_0_IRQ INTEL_QMSI_GPIO_B0000C00_IRQ_0
#define CONFIG_GPIO_QMSI_0_IRQ_PRI INTEL_QMSI_GPIO_B0000C00_IRQ_0_PRIORITY
#define CONFIG_GPIO_QMSI_0_IRQ_FLAGS INTEL_QMSI_GPIO_B0000C00_IRQ_0_SENSE
#define CONFIG_GPIO_QMSI_1_NAME INTEL_QMSI_GPIO_B0800B00_LABEL
#define CONFIG_GPIO_QMSI_1_IRQ INTEL_QMSI_GPIO_B0800B00_IRQ_0
#define CONFIG_GPIO_QMSI_1_IRQ_PRI INTEL_QMSI_GPIO_B0800B00_IRQ_0_PRIORITY
#define CONFIG_GPIO_QMSI_1_IRQ_FLAGS INTEL_QMSI_GPIO_B0800B00_IRQ_0_SENSE
/* End of SoC Level DTS fixup file */

View file

@ -50,12 +50,12 @@ config GPIO_QMSI_0
config GPIO_QMSI_0_NAME
string "Driver name"
depends on GPIO_QMSI_0
depends on GPIO_QMSI_0 && !HAS_DTS
default "GPIO_0"
config GPIO_QMSI_0_IRQ_PRI
int "Controller interrupt priority"
depends on GPIO_QMSI_0
depends on GPIO_QMSI_0 && !HAS_DTS
help
IRQ priority
@ -67,12 +67,12 @@ config GPIO_QMSI_1
config GPIO_QMSI_1_NAME
string "Driver name"
depends on GPIO_QMSI_1
depends on GPIO_QMSI_1 && !HAS_DTS
default "GPIO_1"
config GPIO_QMSI_1_IRQ_PRI
int "Controller interrupt priority"
depends on GPIO_QMSI_1
depends on GPIO_QMSI_1 && !HAS_DTS
help
IRQ priority

View file

@ -378,18 +378,18 @@ static int gpio_qmsi_init(struct device *port)
CLK_PERIPH_GPIO_INTERRUPT |
CLK_PERIPH_GPIO_DB |
CLK_PERIPH_CLK);
IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_GPIO_0_INT),
IRQ_CONNECT(CONFIG_GPIO_QMSI_0_IRQ,
CONFIG_GPIO_QMSI_0_IRQ_PRI, qm_gpio_0_isr, 0,
IOAPIC_LEVEL | IOAPIC_HIGH);
irq_enable(IRQ_GET_NUMBER(QM_IRQ_GPIO_0_INT));
CONFIG_GPIO_QMSI_0_IRQ_FLAGS);
irq_enable(CONFIG_GPIO_QMSI_0_IRQ);
QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->gpio_0_int_mask);
break;
#ifdef CONFIG_GPIO_QMSI_1
case QM_AON_GPIO_0:
IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_AON_GPIO_0_INT),
IRQ_CONNECT(CONFIG_GPIO_QMSI_1_IRQ,
CONFIG_GPIO_QMSI_1_IRQ_PRI, qm_aon_gpio_0_isr,
0, IOAPIC_LEVEL | IOAPIC_HIGH);
irq_enable(IRQ_GET_NUMBER(QM_IRQ_AON_GPIO_0_INT));
0, CONFIG_GPIO_QMSI_1_IRQ_FLAGS);
irq_enable(CONFIG_GPIO_QMSI_1_IRQ);
QM_IR_UNMASK_INTERRUPTS(
QM_INTERRUPT_ROUTER->aon_gpio_0_int_mask);
break;

View file

@ -90,6 +90,7 @@
reg = <0xb0000c00 0x400>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 2>;
interrupt-parent = <&intc>;
label = "GPIO_0";
gpio-controller;
#gpio-cells = <2>;
@ -100,6 +101,7 @@
reg = <0xb0800b00 0x400>;
interrupts = <31 IRQ_TYPE_LEVEL_HIGH 2>;
interrupt-parent = <&intc>;
label = "GPIO_1";
gpio-controller;
#gpio-cells = <2>;

View file

@ -80,6 +80,7 @@
reg = <0xb0000c00 0x400>;
interrupts = <15 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&intc>;
label = "GPIO_0";
gpio-controller;
#gpio-cells = <2>;