lpc: Add usart shim driver for lpcxpresso54114

Add usart-yaml in dts.

Build fsl_lpc_usart and fsl_lpc_flexcomm in
ext/hal/nxp/mcux/drivers/Makefile.

Only polling mode is implemented in usart now. Interrupt can be added in
future.

Signed-off-by: Shiksha Patel <shiksha.patel@nxp.com>
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>

drivers/serial/CMakeLists.txt

@@ -17,5 +17,6 @@ zephyr_sources_if_kconfig(usart_sam.c)
 zephyr_sources_if_kconfig(uart_stellaris.c)
 zephyr_sources_if_kconfig(uart_stm32.c)
 zephyr_sources_if_kconfig(uart_sam0.c)
+zephyr_sources_if_kconfig(usart_mcux_lpc.c)
 
 zephyr_sources_ifdef(CONFIG_USERSPACE   uart_handlers.c)

drivers/serial/Kconfig

@@ -67,6 +67,8 @@ source "drivers/serial/Kconfig.ns16550"
 
 source "drivers/serial/Kconfig.mcux"
 
+source "drivers/serial/Kconfig.mcux_lpc_usart"
+
 source "drivers/serial/Kconfig.mcux_lpsci"
 
 source "drivers/serial/Kconfig.mcux_lpuart"

drivers/serial/Kconfig.mcux_lpc_usart

@@ -0,0 +1,23 @@
+# Kconfig - MCUXpresso SDK USART
+#
+# Copyright 2017, NXP
+#
+# SPDX-License-Identifier: Apache-2.0
+
+menuconfig USART_MCUX_LPC
+	bool "MCUX USART driver"
+	depends on HAS_MCUX
+	default n
+	select SERIAL_HAS_DRIVER
+	help
+	  Enable the MCUX USART driver.
+
+if USART_MCUX_LPC
+
+menuconfig USART_MCUX_LPC_0
+	bool "USART 0"
+	default n
+	help
+	  Enable USART 0.
+
+endif # USART_MCUX_LPC

drivers/serial/usart_mcux_lpc.c

@@ -0,0 +1,126 @@
+/*
+ * Copyright (c) 2017, NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/** @file
+ * @brief USART driver for LPC54XXX family
+ *
+ * Note:
+ * - Only basic USART features sufficient to support printf functionality
+ *   are currently implemented.
+ * - The driver works only in polling mode, interrupt mode is not implemented.
+ */
+
+#include <errno.h>
+#include <device.h>
+#include <uart.h>
+#include <fsl_lpc_usart.h>
+#include <fsl_clock.h>
+#include <soc.h>
+#include <fsl_device_registers.h>
+
+struct usart_mcux_lpc_config {
+	USART_Type *base;
+	clock_name_t clock_source;
+	u32_t baud_rate;
+};
+
+struct usart_mcux_lpc_data {
+	/* put irq call back instance when required */
+};
+
+static int usart_mcux_lpc_poll_in(struct device *dev, unsigned char *c)
+{
+	const struct usart_mcux_lpc_config *config = dev->config->config_info;
+	u32_t flags = USART_GetStatusFlags(config->base);
+	int ret = -1;
+
+	if (flags & kUSART_RxFifoFullFlag) {
+		*c = USART_ReadByte(config->base);
+		ret = 0;
+	}
+
+	return ret;
+}
+
+static unsigned char usart_mcux_lpc_poll_out(struct device *dev,
+					     unsigned char c)
+{
+	const struct usart_mcux_lpc_config *config = dev->config->config_info;
+
+	/* Wait until space is available in TX FIFO */
+	while (!(USART_GetStatusFlags(config->base) & kUSART_TxFifoEmptyFlag))
+		;
+
+	USART_WriteByte(config->base, c);
+
+	return c;
+}
+
+static int usart_mcux_lpc_err_check(struct device *dev)
+{
+	const struct usart_mcux_lpc_config *config = dev->config->config_info;
+	u32_t flags = USART_GetStatusFlags(config->base);
+	int err = 0;
+
+	if (flags & kStatus_USART_RxRingBufferOverrun) {
+		err |= UART_ERROR_OVERRUN;
+	}
+
+	if (flags & kStatus_USART_ParityError) {
+		err |= UART_ERROR_PARITY;
+	}
+
+	if (flags & kStatus_USART_FramingError) {
+		err |= UART_ERROR_FRAMING;
+	}
+
+	USART_ClearStatusFlags(config->base,
+			       kStatus_USART_RxRingBufferOverrun |
+			       kStatus_USART_ParityError |
+			       kStatus_USART_FramingError);
+
+	return err;
+}
+
+static int usart_mcux_lpc_init(struct device *dev)
+{
+	const struct usart_mcux_lpc_config *config = dev->config->config_info;
+	usart_config_t usart_config;
+	u32_t clock_freq;
+
+	clock_freq = CLOCK_GetFreq(config->clock_source);
+
+	USART_GetDefaultConfig(&usart_config);
+	usart_config.enableTx = true;
+	usart_config.enableRx = true;
+	usart_config.baudRate_Bps = config->baud_rate;
+
+	USART_Init(config->base, &usart_config, clock_freq);
+
+	return 0;
+}
+
+static const struct uart_driver_api usart_mcux_lpc_driver_api = {
+	.poll_in = usart_mcux_lpc_poll_in,
+	.poll_out = usart_mcux_lpc_poll_out,
+	.err_check = usart_mcux_lpc_err_check,
+};
+
+#ifdef CONFIG_USART_MCUX_LPC_0
+static const struct usart_mcux_lpc_config usart_mcux_lpc_0_config = {
+	.base = (USART_Type *)CONFIG_USART_MCUX_LPC_0_BASE_ADDRESS,
+	.clock_source = kCLOCK_Flexcomm0,
+	.baud_rate = CONFIG_USART_MCUX_LPC_0_BAUD_RATE,
+};
+
+static struct usart_mcux_lpc_data usart_mcux_lpc_0_data;
+
+DEVICE_AND_API_INIT(usart_0, CONFIG_USART_MCUX_LPC_0_NAME,
+		    &usart_mcux_lpc_init,
+		    &usart_mcux_lpc_0_data, &usart_mcux_lpc_0_config,
+		    PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
+		    &usart_mcux_lpc_driver_api);
+#endif /* CONFIG_USART_MCUX_LPC_0 */

dts/bindings/serial/nxp,lpc-usart.yaml

@@ -0,0 +1,47 @@
+#
+# Copyright (c) 2017, NXP
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+---
+title: LPC USART
+id: nxp,lpc-usart
+version: 0.1
+
+description: >
+    This binding gives a base representation of the LPC USART
+
+inherits:
+    !include uart.yaml
+
+properties:
+    compatible:
+      type: string
+      category: required
+      description: compatible strings
+      constraint: "nxp,lpc-usart"
+
+    reg:
+      type: array
+      description: mmio register space
+      generation: define
+      category: required
+
+    interrupts:
+      type: array
+      category: required
+      description: required interrupts
+      generation: define
+
+    pinctrl-\d+:
+      type: array
+      category: optional
+      description: pinmux information for RX, TX, CTS, RTS
+      generation: define
+
+    clocks:
+      type: array
+      category: required
+      description: Clock gate control information
+      generation: structures
+...

ext/hal/nxp/mcux/drivers/CMakeLists.txt

@@ -12,3 +12,4 @@ zephyr_sources_ifdef(CONFIG_SPI_MCUX_DSPI     fsl_dspi.c)
 zephyr_sources_ifdef(CONFIG_UART_MCUX         fsl_uart.c)
 zephyr_sources_ifdef(CONFIG_UART_MCUX_LPSCI   fsl_lpsci.c)
 zephyr_sources_ifdef(CONFIG_UART_MCUX_LPUART  fsl_lpuart.c)
+zephyr_sources_ifdef(CONFIG_USART_MCUX_LPC    fsl_lpc_usart.c fsl_lpc_flexcomm.c)