drivers: adc: add Microchip MCP320x driver
Add driver for the Microchip MCP3204/MCP3208 12 bit ADCs with SPI interface. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit is contained in:
Henrik Brix Andersen
Ioannis Glaropoulos
parent
bc4a472a14
commit
53615ab11b
4 changed files with 409 additions and 0 deletions
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@ -13,4 +13,5 @@ zephyr_library_sources_ifdef(CONFIG_ADC_SAM0 adc_sam0.c)
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zephyr_library_sources_ifdef(CONFIG_ADC_STM32 adc_stm32.c)
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zephyr_library_sources_ifdef(CONFIG_ADC_XEC adc_mchp_xec.c)
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zephyr_library_sources_ifdef(CONFIG_ADC_LMP90XXX adc_lmp90xxx.c)
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zephyr_library_sources_ifdef(CONFIG_ADC_MCP320X adc_mcp320x.c)
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zephyr_library_sources_ifdef(CONFIG_USERSPACE adc_handlers.c)
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@ -59,4 +59,6 @@ source "drivers/adc/Kconfig.xec"
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source "drivers/adc/Kconfig.lmp90xxx"
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source "drivers/adc/Kconfig.mcp320x"
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endif # ADC
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36
drivers/adc/Kconfig.mcp320x
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36
drivers/adc/Kconfig.mcp320x
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@ -0,0 +1,36 @@
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# MCP320x ADC configuration options
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# Copyright (c) 2020 Vestas Wind Systems A/S
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# SPDX-License-Identifier: Apache-2.0
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config ADC_MCP320X
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bool "MCP3204/MCP3208 driver"
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depends on SPI
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help
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Enable MCP3204/MCP3208 ADC driver.
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The MCP3204/MCP3208 are 4/8 channel 12-bit A/D converters
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with SPI interface.
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if ADC_MCP320X
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config ADC_MCP320X_INIT_PRIORITY
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int "Init priority"
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default 80
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help
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MCP320x ADC device driver initialization priority.
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config ADC_MCP320X_ACQUISITION_THREAD_STACK_SIZE
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int "Stack size for the ADC data acquisition thread"
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default 512
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help
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Size of the stack used for the internal data acquisition
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thread.
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config ADC_MCP320X_ACQUISITION_THREAD_PRIO
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int "Priority for the ADC data acquisition thread"
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default 0
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help
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Priority level for the internal ADC data acquisition thread.
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endif # ADC_MCP320X
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370
drivers/adc/adc_mcp320x.c
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370
drivers/adc/adc_mcp320x.c
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@ -0,0 +1,370 @@
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/*
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* Copyright (c) 2020 Vestas Wind Systems A/S
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief ADC driver for the MCP3204/MCP3208 ADCs.
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*/
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#include <drivers/adc.h>
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#include <drivers/gpio.h>
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#include <drivers/spi.h>
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#include <kernel.h>
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#include <logging/log.h>
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#include <sys/byteorder.h>
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#include <sys/util.h>
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#include <zephyr.h>
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LOG_MODULE_REGISTER(adc_mcp320x, CONFIG_ADC_LOG_LEVEL);
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#define ADC_CONTEXT_USES_KERNEL_TIMER
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#include "adc_context.h"
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#define MCP320X_RESOLUTION 12U
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struct mcp320x_config {
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const char *spi_dev_name;
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const char *spi_cs_dev_name;
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u8_t spi_cs_pin;
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struct spi_config spi_cfg;
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u8_t channels;
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};
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struct mcp320x_data {
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struct adc_context ctx;
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struct device *spi_dev;
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struct spi_cs_control spi_cs;
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u16_t *buffer;
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u16_t *repeat_buffer;
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u8_t channels;
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u8_t differential;
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struct k_thread thread;
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struct k_sem sem;
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K_THREAD_STACK_MEMBER(stack,
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CONFIG_ADC_MCP320X_ACQUISITION_THREAD_STACK_SIZE);
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};
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static int mcp320x_channel_setup(struct device *dev,
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const struct adc_channel_cfg *channel_cfg)
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{
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const struct mcp320x_config *config = dev->config->config_info;
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struct mcp320x_data *data = dev->driver_data;
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if (channel_cfg->gain != ADC_GAIN_1) {
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LOG_ERR("unsupported channel gain '%d'", channel_cfg->gain);
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return -ENOTSUP;
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}
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if (channel_cfg->reference != ADC_REF_EXTERNAL0) {
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LOG_ERR("unsupported channel reference '%d'",
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channel_cfg->reference);
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return -ENOTSUP;
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}
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if (channel_cfg->acquisition_time != ADC_ACQ_TIME_DEFAULT) {
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LOG_ERR("unsupported acquisition_time '%d'",
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channel_cfg->acquisition_time);
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return -ENOTSUP;
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}
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if (channel_cfg->channel_id >= config->channels) {
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LOG_ERR("unsupported channel id '%d'", channel_cfg->channel_id);
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return -ENOTSUP;
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}
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WRITE_BIT(data->differential, channel_cfg->channel_id,
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channel_cfg->differential);
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return 0;
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}
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static int mcp320x_validate_buffer_size(struct device *dev,
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const struct adc_sequence *sequence)
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{
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const struct mcp320x_config *config = dev->config->config_info;
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u8_t channels = 0;
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size_t needed;
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u32_t mask;
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for (mask = BIT(config->channels - 1); mask != 0; mask >>= 1) {
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if (mask & sequence->channels) {
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channels++;
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}
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}
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needed = channels * sizeof(u16_t);
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if (sequence->options) {
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needed *= (1 + sequence->options->extra_samplings);
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}
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if (sequence->buffer_size < needed) {
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return -ENOMEM;
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}
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return 0;
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}
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static int mcp320x_start_read(struct device *dev,
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const struct adc_sequence *sequence)
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{
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const struct mcp320x_config *config = dev->config->config_info;
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struct mcp320x_data *data = dev->driver_data;
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int err;
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if (sequence->resolution != MCP320X_RESOLUTION) {
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LOG_ERR("unsupported resolution %d", sequence->resolution);
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return -ENOTSUP;
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}
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if (find_msb_set(sequence->channels) > config->channels) {
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LOG_ERR("unsupported channels in mask: 0x%08x",
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sequence->channels);
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return -ENOTSUP;
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}
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err = mcp320x_validate_buffer_size(dev, sequence);
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if (err) {
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LOG_ERR("buffer size too small");
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return err;
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}
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data->buffer = sequence->buffer;
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adc_context_start_read(&data->ctx, sequence);
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return adc_context_wait_for_completion(&data->ctx);
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}
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static int mcp320x_read_async(struct device *dev,
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const struct adc_sequence *sequence,
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struct k_poll_signal *async)
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{
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struct mcp320x_data *data = dev->driver_data;
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int err;
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adc_context_lock(&data->ctx, async ? true : false, async);
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err = mcp320x_start_read(dev, sequence);
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adc_context_release(&data->ctx, err);
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return err;
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}
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static int mcp320x_read(struct device *dev,
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const struct adc_sequence *sequence)
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{
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return mcp320x_read_async(dev, sequence, NULL);
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}
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static void adc_context_start_sampling(struct adc_context *ctx)
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{
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struct mcp320x_data *data = CONTAINER_OF(ctx, struct mcp320x_data, ctx);
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data->channels = ctx->sequence.channels;
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data->repeat_buffer = data->buffer;
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k_sem_give(&data->sem);
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}
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static void adc_context_update_buffer_pointer(struct adc_context *ctx,
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bool repeat_sampling)
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{
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struct mcp320x_data *data = CONTAINER_OF(ctx, struct mcp320x_data, ctx);
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if (repeat_sampling) {
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data->buffer = data->repeat_buffer;
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}
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}
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static int mcp320x_read_channel(struct device *dev, u8_t channel, u16_t *result)
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{
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const struct mcp320x_config *config = dev->config->config_info;
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struct mcp320x_data *data = dev->driver_data;
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u8_t tx_bytes[2];
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u8_t rx_bytes[2];
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int err;
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const struct spi_buf tx_buf[2] = {
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{
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.buf = tx_bytes,
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.len = sizeof(tx_bytes)
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},
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{
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.buf = NULL,
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.len = 1
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}
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};
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const struct spi_buf rx_buf[2] = {
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{
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.buf = NULL,
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.len = 1
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},
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{
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.buf = rx_bytes,
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.len = sizeof(rx_bytes)
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}
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};
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const struct spi_buf_set tx = {
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.buffers = tx_buf,
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.count = ARRAY_SIZE(tx_buf)
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};
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const struct spi_buf_set rx = {
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.buffers = rx_buf,
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.count = ARRAY_SIZE(rx_buf)
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};
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/*
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* Configuration bits consists of: 5 dummy bits + start bit +
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* SGL/#DIFF bit + D2 + D1 + D0 + 6 dummy bits
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*/
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tx_bytes[0] = BIT(2) | channel >> 2;
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tx_bytes[1] = channel << 6;
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if ((data->differential & BIT(channel)) == 0) {
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tx_bytes[0] |= BIT(1);
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}
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err = spi_transceive(data->spi_dev, &config->spi_cfg, &tx, &rx);
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if (err) {
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return err;
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}
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*result = sys_get_be16(rx_bytes);
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*result &= BIT_MASK(MCP320X_RESOLUTION);
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return 0;
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}
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static void mcp320x_acquisition_thread(struct device *dev)
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{
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struct mcp320x_data *data = dev->driver_data;
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u16_t result = 0;
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u8_t channel;
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int err;
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while (true) {
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k_sem_take(&data->sem, K_FOREVER);
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while (data->channels) {
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channel = find_lsb_set(data->channels) - 1;
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LOG_DBG("reading channel %d", channel);
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err = mcp320x_read_channel(dev, channel, &result);
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if (err) {
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LOG_ERR("failed to read channel %d (err %d)",
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channel, err);
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adc_context_complete(&data->ctx, err);
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break;
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}
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LOG_DBG("read channel %d, result = %d", channel,
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result);
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*data->buffer++ = result;
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WRITE_BIT(data->channels, channel, 0);
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}
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adc_context_on_sampling_done(&data->ctx, dev);
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}
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}
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static int mcp320x_init(struct device *dev)
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{
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const struct mcp320x_config *config = dev->config->config_info;
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struct mcp320x_data *data = dev->driver_data;
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k_sem_init(&data->sem, 0, 1);
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data->spi_dev = device_get_binding(config->spi_dev_name);
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if (!data->spi_dev) {
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LOG_ERR("SPI master device '%s' not found",
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config->spi_dev_name);
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return -EINVAL;
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}
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if (config->spi_cs_dev_name) {
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data->spi_cs.gpio_dev =
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device_get_binding(config->spi_cs_dev_name);
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if (!data->spi_cs.gpio_dev) {
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LOG_ERR("SPI CS GPIO device '%s' not found",
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config->spi_cs_dev_name);
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return -EINVAL;
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}
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data->spi_cs.gpio_pin = config->spi_cs_pin;
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}
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k_thread_create(&data->thread, data->stack,
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CONFIG_ADC_MCP320X_ACQUISITION_THREAD_STACK_SIZE,
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(k_thread_entry_t)mcp320x_acquisition_thread,
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dev, NULL, NULL,
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CONFIG_ADC_MCP320X_ACQUISITION_THREAD_PRIO,
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0, K_NO_WAIT);
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adc_context_unlock_unconditionally(&data->ctx);
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return 0;
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}
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static const struct adc_driver_api mcp320x_adc_api = {
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.channel_setup = mcp320x_channel_setup,
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.read = mcp320x_read,
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#ifdef CONFIG_ADC_ASYNC
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.read_async = mcp320x_read_async,
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#endif
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};
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#define DT_INST_MCP320X(inst, t) DT_INST(inst, microchip_mcp##t)
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#define MCP320X_DEVICE(t, n, ch) \
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static struct mcp320x_data mcp##t##_data_##n = { \
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ADC_CONTEXT_INIT_TIMER(mcp##t##_data_##n, ctx), \
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ADC_CONTEXT_INIT_LOCK(mcp##t##_data_##n, ctx), \
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ADC_CONTEXT_INIT_SYNC(mcp##t##_data_##n, ctx), \
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}; \
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static const struct mcp320x_config mcp##t##_config_##n = { \
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.spi_dev_name = DT_BUS_LABEL(DT_INST_MCP320X(n, t)), \
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.spi_cs_dev_name = \
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UTIL_AND( \
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DT_SPI_DEV_HAS_CS_GPIOS(DT_INST_MCP320X(n, t)), \
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DT_SPI_DEV_CS_GPIOS_LABEL(DT_INST_MCP320X(n, t)) \
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), \
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.spi_cs_pin = \
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UTIL_AND( \
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DT_SPI_DEV_HAS_CS_GPIOS(DT_INST_MCP320X(n, t)), \
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DT_SPI_DEV_CS_GPIOS_PIN(DT_INST_MCP320X(n, t)) \
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), \
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.spi_cfg = { \
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.operation = (SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB | \
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SPI_WORD_SET(8)), \
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.frequency = DT_PROP(DT_INST_MCP320X(n, t), \
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spi_max_frequency), \
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.slave = DT_REG_ADDR(DT_INST_MCP320X(n, t)), \
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.cs = &mcp##t##_data_##n.spi_cs, \
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}, \
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.channels = ch, \
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}; \
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DEVICE_AND_API_INIT(mcp##t##_##n, \
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DT_LABEL(DT_INST_MCP320X(n, t)), \
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&mcp320x_init, &mcp##t##_data_##n, \
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&mcp##t##_config_##n, POST_KERNEL, \
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CONFIG_ADC_MCP320X_INIT_PRIORITY, \
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&mcp320x_adc_api)
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/*
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* MCP3204: 4 channels
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*/
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#define MCP3204_DEVICE(n) MCP320X_DEVICE(3204, n, 4)
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/*
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* MCP3208: 8 channels
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*/
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#define MCP3208_DEVICE(n) MCP320X_DEVICE(3208, n, 8)
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#define DT_INST_MCP320X_FOREACH(t, inst_expr) \
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UTIL_LISTIFY(DT_NUM_INST(microchip_mcp##t), DT_CALL_WITH_ARG, inst_expr)
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DT_INST_MCP320X_FOREACH(3204, MCP3204_DEVICE);
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DT_INST_MCP320X_FOREACH(3208, MCP3208_DEVICE);
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