sensor: adxl362: convert to _dt_spec

Convert adxl362 driver to use `spi_dt_spec` and `gpio_dt_spec`.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This commit is contained in:
Jordan Yates 2021-08-07 13:29:33 +10:00 committed by Christopher Friedt
commit 534bfbda8a
3 changed files with 29 additions and 99 deletions

View file

@ -24,9 +24,10 @@ LOG_MODULE_REGISTER(ADXL362, CONFIG_SENSOR_LOG_LEVEL);
static struct adxl362_data adxl362_data; static struct adxl362_data adxl362_data;
static int adxl362_reg_access(struct adxl362_data *ctx, uint8_t cmd, static int adxl362_reg_access(const struct device *dev, uint8_t cmd,
uint8_t reg_addr, void *data, size_t length) uint8_t reg_addr, void *data, size_t length)
{ {
const struct adxl362_config *cfg = dev->config;
uint8_t access[2] = { cmd, reg_addr }; uint8_t access[2] = { cmd, reg_addr };
const struct spi_buf buf[2] = { const struct spi_buf buf[2] = {
{ {
@ -50,25 +51,20 @@ static int adxl362_reg_access(struct adxl362_data *ctx, uint8_t cmd,
tx.count = 1; tx.count = 1;
return spi_transceive(ctx->spi, &ctx->spi_cfg, &tx, &rx); return spi_transceive_dt(&cfg->bus, &tx, &rx);
} }
tx.count = 2; tx.count = 2;
return spi_write(ctx->spi, &ctx->spi_cfg, &tx); return spi_write_dt(&cfg->bus, &tx);
} }
static inline int adxl362_set_reg(const struct device *dev, static inline int adxl362_set_reg(const struct device *dev,
uint16_t register_value, uint16_t register_value,
uint8_t register_address, uint8_t count) uint8_t register_address, uint8_t count)
{ {
struct adxl362_data *adxl362_data = dev->data; return adxl362_reg_access(dev, ADXL362_WRITE_REG,
register_address, &register_value, count);
return adxl362_reg_access(adxl362_data,
ADXL362_WRITE_REG,
register_address,
&register_value,
count);
} }
int adxl362_reg_write_mask(const struct device *dev, uint8_t register_address, int adxl362_reg_write_mask(const struct device *dev, uint8_t register_address,
@ -76,13 +72,9 @@ int adxl362_reg_write_mask(const struct device *dev, uint8_t register_address,
{ {
int ret; int ret;
uint8_t tmp; uint8_t tmp;
struct adxl362_data *adxl362_data = dev->data;
ret = adxl362_reg_access(adxl362_data, ret = adxl362_reg_access(dev, ADXL362_READ_REG,
ADXL362_READ_REG, register_address, &tmp, 1);
register_address,
&tmp,
1);
if (ret) { if (ret) {
return ret; return ret;
@ -91,22 +83,16 @@ int adxl362_reg_write_mask(const struct device *dev, uint8_t register_address,
tmp &= ~mask; tmp &= ~mask;
tmp |= data; tmp |= data;
return adxl362_reg_access(adxl362_data, return adxl362_reg_access(dev, ADXL362_WRITE_REG,
ADXL362_WRITE_REG, register_address, &tmp, 1);
register_address,
&tmp,
1);
} }
static inline int adxl362_get_reg(const struct device *dev, uint8_t *read_buf, static inline int adxl362_get_reg(const struct device *dev, uint8_t *read_buf,
uint8_t register_address, uint8_t count) uint8_t register_address, uint8_t count)
{ {
struct adxl362_data *adxl362_data = dev->data;
return adxl362_reg_access(adxl362_data, return adxl362_reg_access(dev, ADXL362_READ_REG,
ADXL362_READ_REG, register_address, read_buf, count);
register_address,
read_buf, count);
} }
#if defined(CONFIG_ADXL362_TRIGGER) #if defined(CONFIG_ADXL362_TRIGGER)
@ -115,23 +101,16 @@ static int adxl362_interrupt_config(const struct device *dev,
uint8_t int2) uint8_t int2)
{ {
int ret; int ret;
struct adxl362_data *adxl362_data = dev->data;
ret = adxl362_reg_access(adxl362_data, ret = adxl362_reg_access(dev, ADXL362_WRITE_REG,
ADXL362_WRITE_REG, ADXL362_REG_INTMAP1, &int1, 1);
ADXL362_REG_INTMAP1,
&int1,
1);
if (ret) { if (ret) {
return ret; return ret;
} }
return ret = adxl362_reg_access(adxl362_data, return ret = adxl362_reg_access(dev, ADXL362_WRITE_REG,
ADXL362_WRITE_REG, ADXL362_REG_INTMAP2, &int2, 1);
ADXL362_REG_INTMAP2,
&int2,
1);
} }
int adxl362_get_status(const struct device *dev, uint8_t *status) int adxl362_get_status(const struct device *dev, uint8_t *status)
@ -737,35 +716,14 @@ static int adxl362_chip_init(const struct device *dev)
static int adxl362_init(const struct device *dev) static int adxl362_init(const struct device *dev)
{ {
const struct adxl362_config *config = dev->config; const struct adxl362_config *config = dev->config;
struct adxl362_data *data = dev->data;
uint8_t value; uint8_t value;
int err; int err;
data->spi = device_get_binding(config->spi_name); if (!spi_is_ready(&config->bus)) {
if (!data->spi) { LOG_DBG("spi device not ready: %s", config->bus.bus->name);
LOG_DBG("spi device not found: %s", config->spi_name);
return -EINVAL; return -EINVAL;
} }
data->spi_cfg.operation = SPI_WORD_SET(8) | SPI_TRANSFER_MSB;
data->spi_cfg.frequency = config->spi_max_frequency;
data->spi_cfg.slave = config->spi_slave;
#if DT_INST_SPI_DEV_HAS_CS_GPIOS(0)
data->adxl362_cs_ctrl.gpio_dev =
device_get_binding(config->gpio_cs_port);
if (!data->adxl362_cs_ctrl.gpio_dev) {
LOG_ERR("Unable to get GPIO SPI CS device");
return -ENODEV;
}
data->adxl362_cs_ctrl.gpio_pin = config->cs_gpio;
data->adxl362_cs_ctrl.gpio_dt_flags = config->cs_flags;
data->adxl362_cs_ctrl.delay = 0U;
data->spi_cfg.cs = &data->adxl362_cs_ctrl;
#endif
err = adxl362_software_reset(dev); err = adxl362_software_reset(dev);
if (err) { if (err) {
@ -803,18 +761,9 @@ static int adxl362_init(const struct device *dev)
} }
static const struct adxl362_config adxl362_config = { static const struct adxl362_config adxl362_config = {
.spi_name = DT_INST_BUS_LABEL(0), .bus = SPI_DT_SPEC_INST_GET(0, SPI_WORD_SET(8) | SPI_TRANSFER_MSB, 0),
.spi_slave = DT_INST_REG_ADDR(0),
.spi_max_frequency = DT_INST_PROP(0, spi_max_frequency),
#if DT_INST_SPI_DEV_HAS_CS_GPIOS(0)
.gpio_cs_port = DT_INST_SPI_DEV_CS_GPIOS_LABEL(0),
.cs_gpio = DT_INST_SPI_DEV_CS_GPIOS_PIN(0),
.cs_flags = DT_INST_SPI_DEV_CS_GPIOS_FLAGS(0),
#endif
#if defined(CONFIG_ADXL362_TRIGGER) #if defined(CONFIG_ADXL362_TRIGGER)
.gpio_port = DT_INST_GPIO_LABEL(0, int1_gpios), .interrupt = GPIO_DT_SPEC_INST_GET(0, int1_gpios),
.int_gpio = DT_INST_GPIO_PIN(0, int1_gpios),
.int_flags = DT_INST_GPIO_FLAGS(0, int1_gpios),
#endif #endif
}; };

View file

@ -171,29 +171,15 @@
#define ADXL362_TEMP_BIAS_LSB 350 #define ADXL362_TEMP_BIAS_LSB 350
struct adxl362_config { struct adxl362_config {
char *spi_name; struct spi_dt_spec bus;
uint32_t spi_max_frequency;
uint16_t spi_slave;
#if DT_INST_SPI_DEV_HAS_CS_GPIOS(0)
const char *gpio_cs_port;
gpio_pin_t cs_gpio;
gpio_dt_flags_t cs_flags;
#endif
#if defined(CONFIG_ADXL362_TRIGGER) #if defined(CONFIG_ADXL362_TRIGGER)
const char *gpio_port; struct gpio_dt_spec interrupt;
gpio_pin_t int_gpio;
gpio_dt_flags_t int_flags;
uint8_t int1_config; uint8_t int1_config;
uint8_t int2_config; uint8_t int2_config;
#endif #endif
}; };
struct adxl362_data { struct adxl362_data {
const struct device *spi;
struct spi_config spi_cfg;
#if DT_INST_SPI_DEV_HAS_CS_GPIOS(0)
struct spi_cs_control adxl362_cs_ctrl;
#endif
union { union {
int16_t acc_xyz[3]; int16_t acc_xyz[3];
struct { struct {
@ -207,7 +193,6 @@ struct adxl362_data {
#if defined(CONFIG_ADXL362_TRIGGER) #if defined(CONFIG_ADXL362_TRIGGER)
const struct device *dev; const struct device *dev;
const struct device *gpio;
struct gpio_callback gpio_cb; struct gpio_callback gpio_cb;
struct k_mutex trigger_mutex; struct k_mutex trigger_mutex;

View file

@ -116,16 +116,14 @@ int adxl362_trigger_set(const struct device *dev,
int adxl362_init_interrupt(const struct device *dev) int adxl362_init_interrupt(const struct device *dev)
{ {
struct adxl362_data *drv_data = dev->data;
const struct adxl362_config *cfg = dev->config; const struct adxl362_config *cfg = dev->config;
struct adxl362_data *drv_data = dev->data;
int ret; int ret;
k_mutex_init(&drv_data->trigger_mutex); k_mutex_init(&drv_data->trigger_mutex);
drv_data->gpio = device_get_binding(cfg->gpio_port); if (!device_is_ready(cfg->interrupt.port)) {
if (drv_data->gpio == NULL) { LOG_ERR("GPIO port %s not ready", cfg->interrupt.port->name);
LOG_ERR("Failed to get pointer to %s device!",
cfg->gpio_port);
return -EINVAL; return -EINVAL;
} }
@ -135,14 +133,13 @@ int adxl362_init_interrupt(const struct device *dev)
return -EFAULT; return -EFAULT;
} }
gpio_pin_configure(drv_data->gpio, cfg->int_gpio, gpio_pin_configure_dt(&cfg->interrupt, GPIO_INPUT);
GPIO_INPUT | cfg->int_flags);
gpio_init_callback(&drv_data->gpio_cb, gpio_init_callback(&drv_data->gpio_cb,
adxl362_gpio_callback, adxl362_gpio_callback,
BIT(cfg->int_gpio)); BIT(cfg->interrupt.pin));
if (gpio_add_callback(drv_data->gpio, &drv_data->gpio_cb) < 0) { if (gpio_add_callback(cfg->interrupt.port, &drv_data->gpio_cb) < 0) {
LOG_ERR("Failed to set gpio callback!"); LOG_ERR("Failed to set gpio callback!");
return -EIO; return -EIO;
} }
@ -161,8 +158,7 @@ int adxl362_init_interrupt(const struct device *dev)
drv_data->work.handler = adxl362_work_cb; drv_data->work.handler = adxl362_work_cb;
#endif #endif
gpio_pin_interrupt_configure(drv_data->gpio, cfg->int_gpio, gpio_pin_interrupt_configure_dt(&cfg->interrupt, GPIO_INT_EDGE_TO_ACTIVE);
GPIO_INT_EDGE_TO_ACTIVE);
return 0; return 0;
} }