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drivers/i2s_sam_ssc.c: enable cache support

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Enable cache operations before starting a DMA operation if the CPU has a
cache. All the support was already in place, it just needs to be
enabled.

With the previous commits, it allows the I2S tests to pass on a SAM E70
Xplained board with the CPU cache enabled.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Aurelien Jarno 2018-11-17 00:46:03 +01:00 • committed by Anas Nashif
commit 532550cba1
1 changed files with 1 additions and 5 deletions
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6
drivers/i2s/i2s_sam_ssc.c
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@ -32,11 +32,7 @@
#include <logging/log.h>
LOG_MODULE_REGISTER(LOG_DOMAIN);
/* FIXME change to
* #if __DCACHE_PRESENT == 1
* when cache support is added
*/
#if 0
#if __DCACHE_PRESENT == 1
#define DCACHE_INVALIDATE(addr, size) \
SCB_InvalidateDCache_by_Addr((u32_t *)addr, size)
#define DCACHE_CLEAN(addr, size) \