boards: arm: Add support for 96Boards Neonkey Board

This patch adds support for 96Boards Neonkey Mezzanine
board.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

CODEOWNERS

@@ -32,6 +32,7 @@ boards/arc/quark_se_c1000_ss_devboard/*  @nashif
 boards/arm/*                             @MaureenHelm @galak
 boards/arm/96b_carbon/*                  @rsalveti @idlethread
 boards/arm/96b_nitrogen/*                @idlethread
+boards/arm/96b_neonkey/*                 @Mani-Sadhasivam
 boards/arm/arduino_101_ble/*             @jhedberg
 boards/arm/cc3220sf_launchxl/*           @GAnthony
 boards/arm/disco_l475_iot1/*             @erwango

boards/arm/96b_neonkey/96b_neonkey.yaml

@@ -0,0 +1,7 @@
+identifier: 96b_neonkey
+name: 96Boards Neonkey
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gccarmemb

boards/arm/96b_neonkey/96b_neonkey_defconfig

@@ -0,0 +1,53 @@
+CONFIG_ARM=y
+CONFIG_BOARD_96B_NEONKEY=y
+CONFIG_SOC_FAMILY_STM32=y
+CONFIG_SOC_SERIES_STM32F4X=y
+CONFIG_SOC_STM32F411XE=y
+CONFIG_CORTEX_M_SYSTICK=y
+
+# 84MHz system clock
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
+
+# enable uart driver
+CONFIG_SERIAL=y
+CONFIG_UART_STM32=y
+
+# enable USART1
+CONFIG_UART_STM32_PORT_1=y
+
+# enable pinmux
+CONFIG_PINMUX=y
+CONFIG_PINMUX_STM32=y
+
+# enable GPIOs
+CONFIG_GPIO=y
+CONFIG_GPIO_STM32=y
+CONFIG_GPIO_STM32_PORTA=y
+CONFIG_GPIO_STM32_PORTB=y
+CONFIG_GPIO_STM32_PORTC=y
+CONFIG_GPIO_STM32_PORTD=y
+CONFIG_GPIO_STM32_PORTE=y
+
+# clock configuration
+CONFIG_CLOCK_CONTROL=y
+
+# SYSCLK selection
+CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
+
+# PLL configuration
+CONFIG_CLOCK_STM32_PLL_SRC_HSI=y
+
+# produce 84MHz clock at PLL output
+CONFIG_CLOCK_STM32_PLL_M_DIVISOR=16
+CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=336
+CONFIG_CLOCK_STM32_PLL_P_DIVISOR=4
+CONFIG_CLOCK_STM32_AHB_PRESCALER=1
+
+# APB1 clock must not exceed 50MHz limit
+CONFIG_CLOCK_STM32_APB1_PRESCALER=2
+CONFIG_CLOCK_STM32_APB2_PRESCALER=1
+
+# console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y

boards/arm/96b_neonkey/Kconfig.board

@@ -0,0 +1,9 @@
+# Kconfig - 96Boards Neonkey Board Configuration
+#
+# Copyright (c) 2017 Linaro Limited
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+config BOARD_96B_NEONKEY
+	bool "96Boards Neonkey"
+	depends on SOC_STM32F411XE

boards/arm/96b_neonkey/Kconfig.defconfig

@@ -0,0 +1,13 @@
+# Kconfig - 96Boards Neonkey Board Configuration
+#
+# Copyright (c) 2017 Linaro Limited
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+if BOARD_96B_NEONKEY
+
+config BOARD
+	default 96b_neonkey
+
+endif # BOARD_96B_NEONKEY

boards/arm/96b_neonkey/Makefile

@@ -0,0 +1,8 @@
+# Copyright (c) 2017 Linaro Limited
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+ccflags-y +=-I$(srctree)/drivers
+
+obj-y += pinmux.o

boards/arm/96b_neonkey/board.h

@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2017 Linaro Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef __INC_BOARD_H
+#define __INC_BOARD_H
+
+#include <soc.h>
+
+/* USER push button */
+#define USER_PB_GPIO_PORT "GPIOB"
+#define USER_PB_GPIO_PIN   2
+
+/* Onboard USR0 GREEN LED */
+#define USR0_GPIO_PIN     12
+#define USR0_GPIO_PORT    "GPIOB"
+
+/* Onboard USR1 GREEN LED */
+#define USR1_GPIO_PIN     13
+#define USR1_GPIO_PORT    "GPIOB"
+
+/* Onboard USR2 GREEN LED */
+#define USR2_GPIO_PIN     14
+#define USR2_GPIO_PORT    "GPIOB"
+
+/* Onboard USR3 GREEN LED */
+#define USR3_GPIO_PIN     15
+#define USR3_GPIO_PORT    "GPIOB"
+
+/* Aliases to make the basic LED samples work */
+#define SW0_GPIO_NAME     USER_PB_GPIO_PORT
+#define SW0_GPIO_PIN      USER_PB_GPIO_PIN
+#define LED0_GPIO_PIN     USR0_GPIO_PIN
+#define LED0_GPIO_PORT    USR0_GPIO_PORT
+#define LED1_GPIO_PIN     USR1_GPIO_PIN
+#define LED1_GPIO_PORT    USR1_GPIO_PORT
+#define LED2_GPIO_PIN     USR2_GPIO_PIN
+#define LED2_GPIO_PORT    USR2_GPIO_PORT
+#define LED3_GPIO_PIN     USR3_GPIO_PIN
+#define LED3_GPIO_PORT    USR3_GPIO_PORT
+
+#endif /* __INC_BOARD_H */

boards/arm/96b_neonkey/doc/96b_neonkey.rst

@@ -0,0 +1,228 @@
+.. _96b_neonkey:
+
+96Boards Neonkey
+################
+
+Overview
+********
+
+96Boards Neonkey board is based on the STMicroelectronics STM32F411CE
+Cortex M4 CPU. Zephyr applications use the 96b_neonkey configuration
+to run on these boards.
+
+.. figure:: img/96b-neonkey-front.jpg
+     :width: 500px
+     :align: center
+     :height: 330px
+     :alt: 96Boards Neonkey
+
+     96Boards Neonkey
+
+This board acts as a sensor hub platform for all 96Boards compliant
+family products. It can also be used as a standalone board.
+
+Hardware
+********
+
+96Boards Neonkey provides the following hardware components:
+
+- STM32F411CE in UFQFPN48 package
+- ARM |reg| 32-bit Cortex |reg|-M4 CPU with FPU
+- 84 MHz max CPU frequency
+- 1.8V work voltage
+- 512 KB Flash
+- 128 KB SRAM
+- On board sensors:
+
+  - Temperature/Humidity: SI7034-A10
+  - Pressure: BMP280
+  - ALS/Proximity: RPR-0521RS
+  - Geomagnetic: BMM150
+  - Acclerometer/Gyroscope: BMI160
+  - AMR Hall sensor: MRMS501A
+  - Microphone: SPK0415HM4H-B
+
+- 4 User LEDs
+- 15 General purpose LEDs
+- GPIO with external interrupt capability
+- I2C (3)
+- SPI (1)
+- I2S (1)
+
+Supported Features
+==================
+
+The Zephyr 96b_neonkey board configuration supports the following hardware
+features:
+
++-----------+------------+-------------------------------------+
+| Interface | Controller | Driver/Component                    |
++===========+============+=====================================+
+| NVIC      | on-chip    | nested vector interrupt controller  |
++-----------+------------+-------------------------------------+
+| SYSTICK   | on-chip    | system clock                        |
++-----------+------------+-------------------------------------+
+| UART      | on-chip    | serial port                         |
++-----------+------------+-------------------------------------+
+| GPIO      | on-chip    | gpio                                |
++-----------+------------+-------------------------------------+
+| PINMUX    | on-chip    | pinmux                              |
++-----------+------------+-------------------------------------+
+| FLASH     | on-chip    | flash                               |
++-----------+------------+-------------------------------------+
+| SPI       | on-chip    | spi                                 |
++-----------+------------+-------------------------------------+
+| I2C       | on-chip    | i2c                                 |
++-----------+------------+-------------------------------------+
+
+More details about the board can be found at `96Boards website`_.
+
+The default board configuration can be found in the defconfig file:
+
+        ``boards/arm/96b_neonkey/96b_neonkey_defconfig``
+
+Connections and IOs
+===================
+
+LED
+---
+
+- LED1 / User1 LED = PB12
+- LED2 / User2 LED = PB13
+- LED3 / User3 LED = PB14
+- LED4 / User4 LED = PB15
+
+Push buttons
+------------
+
+- BUTTON = RST (SW1)
+- BUTTON = USR (SW2)
+
+System Clock
+============
+
+96Boards Neonkey can be driven by an internal oscillator as well as the main
+PLL clock. By default System clock is sourced by PLL clock at 84MHz, driven
+by internal oscillator.
+
+Serial Port
+===========
+
+On 96Boards Neonkey Zephyr console output is assigned to USART1.
+Default settings are 115200 8N1.
+
+I2C
+---
+
+96Boards Neonkey board has up to 3 I2Cs. The default I2C mapping for Zephyr is:
+
+- I2C1_SCL : PB6
+- I2C1_SDA : PB7
+- I2C2_SCL : PB10
+- I2C2_SDA : PB3
+- I2C3_SCL : PA8
+- I2C3_SCL : PB4
+
+Programming and Debugging
+*************************
+
+Building
+========
+
+Build the Zephyr kernel and application with:
+
+.. code-block:: console
+
+   $ cd <zephyr_root_path>
+   $ source zephyr-env.sh
+   $ cd $ZEPHYR_BASE/samples/hello_world/
+   $ make BOARD=96b_neonkey
+
+Flashing
+========
+
+96Boards Neonkey can be flashed by two methods, one using the ROM
+bootloader and another using the SWD debug port (which requires additional
+hardware).
+
+Using ROM bootloader:
+---------------------
+
+ROM bootloader can be triggered by the following pattern:
+
+1. Connect BOOT0 to VDD (link JTAG pins 1 and 5 on P4 header)
+2. Press and hold the USR button
+3. Press and release the RST button
+
+More detailed information on activating the ROM bootloder can be found in
+Chapter 29 of Application note `AN2606`_. The ROM bootloader supports flashing
+via UART, I2C and SPI protocols.
+
+For flashing, `stm32flash`_ command line utility can be used. The following
+command will flash the ``zephyr.bin`` binary to the Neonkey board using UART
+and starts its execution:
+
+.. code-block:: console
+
+   $ stm32flash -w zephyr.bin -v -g 0x08000000 /dev/ttyS0
+
+.. note::
+   The above command assumes that Neonkey board is connected to
+   serial port ``/dev/ttyS0``.
+
+Using SWD debugger:
+-------------------
+
+For flashing via SWD debug port, 0.1" male header must be soldered at P4
+header available at the bottom of the board, near RST button.
+
+Use the `Black Magic Debug Probe`_ as an SWD programmer, which can
+be connected to the P4 header using its flying leads and its 20 Pin
+JTAG Adapter Board Kit. When plugged into your host PC, the Black
+Magic Debug Probe enumerates as a USB serial device as documented on
+its `Getting started page`_.
+
+It also uses the GDB binary provided with the Zephyr SDK,
+``arm-zephyr-eabi-gdb``. Other GDB binaries, such as the GDB from GCC
+ARM Embedded, can be used as well.
+
+.. code-block:: console
+
+   $ arm-zephyr-eabi-gdb -q zephyr.elf
+   (gdb) target extended-remote /dev/ttyACM0
+   Remote debugging using /dev/ttyACM0
+   (gdb) monitor swdp_scan
+   Target voltage: 1.8V
+   Available Targets:
+   No. Att Driver
+    1      STM32F4xx
+   (gdb) attach 1
+   Attaching to Remote target
+   0x080005d0 in ?? ()
+   (gdb) load
+
+Debugging
+=========
+
+After flashing 96Boards Neonkey, it can be debugged using the same
+GDB instance. To reattach, just follow the same steps above, till
+"attach 1". You can then debug as usual with GDB. In particular, type
+"run" at the GDB prompt to restart the program you've flashed.
+
+References
+**********
+
+.. _96Boards website:
+   https://www.96boards.org/product/neonkey/
+
+.. _AN2606:
+   https://www.st.com/resource/en/application_note/cd00167594.pdf
+
+.. _stm32flash:
+   https://sourceforge.net/p/stm32flash/wiki/Home/
+
+.. _Black Magic Debug Probe:
+   https://github.com/blacksphere/blackmagic/wiki
+
+.. _Getting started page:
+   https://github.com/blacksphere/blackmagic/wiki/Getting-Started

boards/arm/96b_neonkey/pinmux.c

@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2017 Linaro Limited.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <kernel.h>
+#include <device.h>
+#include <init.h>
+#include <pinmux.h>
+#include <sys_io.h>
+
+#include <pinmux/stm32/pinmux_stm32.h>
+
+/* pin assignments for 96boards Neonkey board */
+static const struct pin_config pinconf[] = {
+#ifdef CONFIG_UART_STM32_PORT_1
+	{STM32_PIN_PA9, STM32F4_PINMUX_FUNC_PA9_USART1_TX},
+	{STM32_PIN_PA10, STM32F4_PINMUX_FUNC_PA10_USART1_RX},
+#endif	/* CONFIG_UART_STM32_PORT_1 */
+#ifdef CONFIG_I2C_1
+	{STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_I2C1_SCL},
+	{STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_I2C1_SDA},
+#endif /* CONFIG_I2C_1 */
+#ifdef CONFIG_I2C_2
+	{STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_I2C2_SCL},
+	{STM32_PIN_PB3, STM32F4_PINMUX_FUNC_PB3_I2C2_SDA},
+#endif /* CONFIG_I2C_2 */
+#ifdef CONFIG_I2C_3
+	{STM32_PIN_PA8, STM32F4_PINMUX_FUNC_PA8_I2C3_SCL},
+	{STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_I2C3_SDA},
+#endif /* CONFIG_I2C_3 */
+#ifdef CONFIG_SPI_1
+	{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
+	{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
+	{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
+	{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
+#endif	/* CONFIG_SPI_1 */
+};
+
+static int pinmux_stm32_init(struct device *port)
+{
+	ARG_UNUSED(port);
+
+	stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
+
+	return 0;
+}
+
+SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1,
+		CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);

dts/arm/96b_neonkey.dts

@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2017 Linaro Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <st/stm32f411.dtsi>
+
+/ {
+	model = "Tocoding Neonkey 96boards";
+	compatible = "tocoding,neonkey", "st,stm32f411";
+
+	chosen {
+		zephyr,console = &usart1;
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+	};
+};
+
+&usart1 {
+	current-speed = <115200>;
+	pinctrl-0 = <&usart1_pins_b>;
+	pinctrl-names = "default";
+	status = "ok";
+};
+
+&i2c1 {
+	status = "ok";
+	clock-frequency = <I2C_BITRATE_FAST>;
+};
+
+&i2c2 {
+	clock-frequency = <I2C_BITRATE_FAST>;
+};
+
+&i2c3 {
+	clock-frequency = <I2C_BITRATE_FAST>;
+};

dts/arm/96b_neonkey.fixup

@@ -0,0 +1,38 @@
+/* This file is a temporary workaround for mapping of the generated information
+ * to the current driver definitions.  This will be removed when the drivers
+ * are modified to handle the generated information, or the mapping of
+ * generated data matches the driver definitions.
+ */
+
+
+#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
+
+#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS	ST_STM32_USART_40011000_BASE_ADDRESS
+#define CONFIG_UART_STM32_PORT_1_BAUD_RATE	ST_STM32_USART_40011000_CURRENT_SPEED
+#define CONFIG_UART_STM32_PORT_1_IRQ_PRI	ST_STM32_USART_40011000_IRQ_0_PRIORITY
+#define CONFIG_UART_STM32_PORT_1_NAME		ST_STM32_USART_40011000_LABEL
+#define PORT_1_IRQ				ST_STM32_USART_40011000_IRQ_0
+
+#define CONFIG_I2C_1_BASE_ADDRESS		ST_STM32_I2C_V1_40005400_BASE_ADDRESS
+#define CONFIG_I2C_1_EVENT_IRQ_PRI		ST_STM32_I2C_V1_40005400_IRQ_EVENT_PRIORITY
+#define CONFIG_I2C_1_ERROR_IRQ_PRI		ST_STM32_I2C_V1_40005400_IRQ_ERROR_PRIORITY
+#define CONFIG_I2C_1_NAME			ST_STM32_I2C_V1_40005400_LABEL
+#define CONFIG_I2C_1_EVENT_IRQ			ST_STM32_I2C_V1_40005400_IRQ_EVENT
+#define CONFIG_I2C_1_ERROR_IRQ			ST_STM32_I2C_V1_40005400_IRQ_ERROR
+#define CONFIG_I2C_1_BITRATE			ST_STM32_I2C_V1_40005400_CLOCK_FREQUENCY
+
+#define CONFIG_I2C_2_BASE_ADDRESS               ST_STM32_I2C_V1_40005800_BASE_ADDRESS
+#define CONFIG_I2C_2_EVENT_IRQ_PRI              ST_STM32_I2C_V1_40005800_IRQ_EVENT_PRIORITY
+#define CONFIG_I2C_2_ERROR_IRQ_PRI              ST_STM32_I2C_V1_40005800_IRQ_ERROR_PRIORITY
+#define CONFIG_I2C_2_NAME                       ST_STM32_I2C_V1_40005800_LABEL
+#define CONFIG_I2C_2_EVENT_IRQ                  ST_STM32_I2C_V1_40005800_IRQ_EVENT
+#define CONFIG_I2C_2_ERROR_IRQ                  ST_STM32_I2C_V1_40005800_IRQ_ERROR
+#define CONFIG_I2C_2_BITRATE                    ST_STM32_I2C_V1_40005800_CLOCK_FREQUENCY
+
+#define CONFIG_I2C_3_BASE_ADDRESS               ST_STM32_I2C_V1_40005C00_BASE_ADDRESS
+#define CONFIG_I2C_3_EVENT_IRQ_PRI              ST_STM32_I2C_V1_40005C00_IRQ_EVENT_PRIORITY
+#define CONFIG_I2C_3_ERROR_IRQ_PRI              ST_STM32_I2C_V1_40005C00_IRQ_ERROR_PRIORITY
+#define CONFIG_I2C_3_NAME                       ST_STM32_I2C_V1_40005C00_LABEL
+#define CONFIG_I2C_3_EVENT_IRQ                  ST_STM32_I2C_V1_40005C00_IRQ_EVENT
+#define CONFIG_I2C_3_ERROR_IRQ                  ST_STM32_I2C_V1_40005C00_IRQ_ERROR
+#define CONFIG_I2C_3_BITRATE                    ST_STM32_I2C_V1_40005C00_CLOCK_FREQUENCY

dts/arm/Makefile

@@ -50,6 +50,7 @@ dtb-$(CONFIG_BOARD_STM32F3_DISCO)       =       stm32f3_disco.dts_compiled
 dtb-$(CONFIG_BOARD_OLIMEX_STM32_P405)	=	olimex_stm32_p405.dts_compiled
 dtb-$(CONFIG_BOARD_STM32F429I_DISC1)	=	stm32f429i_disc1.dts_compiled
 dtb-$(CONFIG_BOARD_EFM32WG_STK3800)	=	efm32wg_stk3800.dts_compiled
+dtb-$(CONFIG_BOARD_96B_NEONKEY)         =       96b_neonkey.dts_compiled
 
 always	:= $(dtb-y)
 endif