arm: Freescale K64/FRDM-K64F Pinmux support
K64 pinmux support is created as a normal driver. As opposed to the Galileo board, the pin configuration options are defined by the MCU and are not board-specific. Separate platform/board-specific configuration code uses the pinmux driver for the default pin settings. For FRDM-K64F, only the Arduino pins (22 of a possible 160) are set up. Some of the I/O pins routed to the Arduino header are also configured as JTAG/SWD signals by default and are used by the OpenSDAv2 debug interface. Therefore, a PRESERVE_JTAG_IO_PINS config option was created for the FRDM-K64 platform to prevent the default pin settings from re-configuring these pins. The K64 MCU separates pin configuration and control, implemented in the pinmux driver, from GPIO. This results in some cross referencing between the K64 GPIO driver and the K64 pinmux driver due to the dependencies of one on the other. This pinmux driver also uses the expanded pinmux function/mode parameter size to describe pin configuration options with bit fields for the K64, including up to 8 pin functions, plus interrupt, pullup/down, drive strength, open-drain and slew rate. The following GCC warnings in the K64 pinmux driver are prevented when not compiling with 'no-optimization' (-O0): warning: 'gpio_dev' may be used uninitialized in this function [-Wmaybe-uninitialized] Change-Id: Ie5031d18750143bf895883058b3cd55fd9989fd3 Signed-off-by: Jeff Blais <jeff.blais@windriver.com>
This commit is contained in:
Jeff Blais
Gerrit Code Review
parent
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commit
52b499fd1f
10 changed files with 973 additions and 43 deletions
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@ -22,6 +22,9 @@
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#include <device.h>
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#include <init.h>
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#include <gpio.h>
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#include <sys_io.h>
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#include <pinmux/pinmux_k64.h>
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#include "gpio_k64.h"
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@ -30,7 +33,16 @@ static int gpio_k64_config(struct device *dev, int access_op,
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uint32_t pin, int flags)
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{
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const struct gpio_k64_config * const cfg = dev->config->config_info;
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uint32_t value = 0;
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uint32_t value;
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uint32_t setting;
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uint8_t i;
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/* check for an invalid pin configuration */
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if (flags & GPIO_INT) {
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/* interrupts not supported */
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return DEV_INVALID_OP;
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}
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/*
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* Setup direction register:
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@ -40,22 +52,70 @@ static int gpio_k64_config(struct device *dev, int access_op,
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if (access_op == GPIO_ACCESS_BY_PIN) {
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if ((flags & GPIO_DIR_MASK) == GPIO_DIR_IN) {
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sys_clear_bit((cfg->base_addr + GPIO_K64_DIR_OFFSET), pin);
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} else {
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sys_set_bit((cfg->base_addr + GPIO_K64_DIR_OFFSET), pin);
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sys_clear_bit((cfg->gpio_base_addr + GPIO_K64_DIR_OFFSET), pin);
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} else { /* GPIO_DIR_OUT */
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sys_set_bit((cfg->gpio_base_addr + GPIO_K64_DIR_OFFSET), pin);
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}
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} else { /* GPIO_ACCESS_BY_PORT */
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if ((flags & GPIO_DIR_MASK) == GPIO_DIR_IN) {
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value = 0x0;
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} else {
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} else { /* GPIO_DIR_OUT */
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value = 0xFFFFFFFF;
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}
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sys_write32(value, (cfg->base_addr + GPIO_K64_DIR_OFFSET));
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sys_write32(value, (cfg->gpio_base_addr + GPIO_K64_DIR_OFFSET));
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}
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/*
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* Set up pullup/pulldown configuration, in Port Control module:
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*/
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if ((flags & GPIO_PUD_MASK) == GPIO_PUD_PULL_UP) {
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setting = (K64_PINMUX_PULL_ENABLE | K64_PINMUX_PULL_UP);
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} else if ((flags & GPIO_PUD_MASK) == GPIO_PUD_PULL_DOWN) {
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setting = (K64_PINMUX_PULL_ENABLE | K64_PINMUX_PULL_DN);
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} else if ((flags & GPIO_PUD_MASK) == GPIO_PUD_NORMAL) {
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setting = K64_PINMUX_PULL_DISABLE;
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} else {
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return DEV_INVALID_OP;
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}
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/* write pull-up/-down configuration settings */
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if (access_op == GPIO_ACCESS_BY_PIN) {
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value = sys_read32((cfg->port_base_addr + K64_PINMUX_CTRL_OFFSET(pin)));
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/* clear, then set configuration values */
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value &= ~(K64_PINMUX_PULL_EN_MASK | K64_PINMUX_PULL_SEL_MASK);
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value |= setting;
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sys_write32(value,
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(cfg->port_base_addr + K64_PINMUX_CTRL_OFFSET(pin)));
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} else { /* GPIO_ACCESS_BY_PORT */
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for (i = 0; i < K64_PINMUX_NUM_PINS; i++) {
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/* clear, then set configuration values */
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value = sys_read32((cfg->port_base_addr +
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K64_PINMUX_CTRL_OFFSET(i)));
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value &= ~(K64_PINMUX_PULL_EN_MASK | K64_PINMUX_PULL_SEL_MASK);
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value |= setting;
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sys_write32(value,
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(cfg->port_base_addr + K64_PINMUX_CTRL_OFFSET(i)));
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}
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}
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return DEV_OK;
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}
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@ -68,14 +128,16 @@ static int gpio_k64_write(struct device *dev, int access_op,
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if (access_op == GPIO_ACCESS_BY_PIN) {
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if (value) {
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sys_set_bit((cfg->base_addr + GPIO_K64_DATA_OUT_OFFSET), pin);
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sys_set_bit((cfg->gpio_base_addr + GPIO_K64_DATA_OUT_OFFSET),
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pin);
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} else {
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sys_clear_bit((cfg->base_addr + GPIO_K64_DATA_OUT_OFFSET), pin);
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sys_clear_bit((cfg->gpio_base_addr + GPIO_K64_DATA_OUT_OFFSET),
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pin);
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}
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} else { /* GPIO_ACCESS_BY_PORT */
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sys_write32(value, (cfg->base_addr + GPIO_K64_DATA_OUT_OFFSET));
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sys_write32(value, (cfg->gpio_base_addr + GPIO_K64_DATA_OUT_OFFSET));
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}
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@ -88,7 +150,7 @@ static int gpio_k64_read(struct device *dev, int access_op,
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{
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const struct gpio_k64_config * const cfg = dev->config->config_info;
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*value = sys_read32((cfg->base_addr + GPIO_K64_DATA_IN_OFFSET));
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*value = sys_read32((cfg->gpio_base_addr + GPIO_K64_DATA_IN_OFFSET));
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if (access_op == GPIO_ACCESS_BY_PIN) {
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*value = (*value & (1 << pin)) >> pin;
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@ -171,7 +233,8 @@ int gpio_k64_init(struct device *dev)
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#ifdef CONFIG_GPIO_K64_A
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static struct gpio_k64_config gpio_k64_A_cfg = {
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.base_addr = CONFIG_GPIO_K64_A_BASE_ADDR,
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.gpio_base_addr = CONFIG_GPIO_K64_A_BASE_ADDR,
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.port_base_addr = CONFIG_PORT_K64_A_BASE_ADDR,
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};
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DEVICE_INIT(gpio_k64_A, CONFIG_GPIO_K64_A_DEV_NAME, gpio_k64_init,
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@ -184,7 +247,8 @@ DEVICE_INIT(gpio_k64_A, CONFIG_GPIO_K64_A_DEV_NAME, gpio_k64_init,
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#ifdef CONFIG_GPIO_K64_B
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static struct gpio_k64_config gpio_k64_B_cfg = {
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.base_addr = CONFIG_GPIO_K64_B_BASE_ADDR,
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.gpio_base_addr = CONFIG_GPIO_K64_B_BASE_ADDR,
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.port_base_addr = CONFIG_PORT_K64_B_BASE_ADDR,
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};
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DEVICE_INIT(gpio_k64_B, CONFIG_GPIO_K64_B_DEV_NAME, gpio_k64_init,
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@ -197,7 +261,8 @@ DEVICE_INIT(gpio_k64_B, CONFIG_GPIO_K64_B_DEV_NAME, gpio_k64_init,
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#ifdef CONFIG_GPIO_K64_C
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static struct gpio_k64_config gpio_k64_C_cfg = {
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.base_addr = CONFIG_GPIO_K64_C_BASE_ADDR,
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.gpio_base_addr = CONFIG_GPIO_K64_C_BASE_ADDR,
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.port_base_addr = CONFIG_PORT_K64_C_BASE_ADDR,
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};
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DEVICE_INIT(gpio_k64_C, CONFIG_GPIO_K64_C_DEV_NAME, gpio_k64_init,
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@ -210,7 +275,8 @@ DEVICE_INIT(gpio_k64_C, CONFIG_GPIO_K64_C_DEV_NAME, gpio_k64_init,
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#ifdef CONFIG_GPIO_K64_D
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static struct gpio_k64_config gpio_k64_D_cfg = {
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.base_addr = CONFIG_GPIO_K64_D_BASE_ADDR,
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.gpio_base_addr = CONFIG_GPIO_K64_D_BASE_ADDR,
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.port_base_addr = CONFIG_PORT_K64_D_BASE_ADDR,
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};
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DEVICE_INIT(gpio_k64_D, CONFIG_GPIO_K64_D_DEV_NAME, gpio_k64_init,
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@ -223,7 +289,8 @@ DEVICE_INIT(gpio_k64_D, CONFIG_GPIO_K64_D_DEV_NAME, gpio_k64_init,
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#ifdef CONFIG_GPIO_K64_E
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static struct gpio_k64_config gpio_k64_E_cfg = {
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.base_addr = CONFIG_GPIO_K64_E_BASE_ADDR,
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.gpio_base_addr = CONFIG_GPIO_K64_E_BASE_ADDR,
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.port_base_addr = CONFIG_PORT_K64_E_BASE_ADDR,
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};
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DEVICE_INIT(gpio_k64_E, CONFIG_GPIO_K64_E_DEV_NAME, gpio_k64_init,
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