diff --git a/drivers/ps2/ps2_mchp_xec.c b/drivers/ps2/ps2_mchp_xec.c
index fa054a0b7bb..261c7455ad6 100644
--- a/drivers/ps2/ps2_mchp_xec.c
+++ b/drivers/ps2/ps2_mchp_xec.c
@@ -86,7 +86,7 @@ static int ps2_xec_write(struct device *dev, u8_t value)
 	 * FSM.
 	 */
 	while (((base->STATUS &
-		(MCHP_PS2_STATUS_RXD_RDY | MCHP_PS2_STATUS_TX_IDLE))
+		(MCHP_PS2_STATUS_RX_BUSY | MCHP_PS2_STATUS_TX_IDLE))
 		!= MCHP_PS2_STATUS_TX_IDLE) && (i < PS2_TIMEOUT)) {
 		k_busy_wait(50);
 		i++;
@@ -102,8 +102,9 @@ static int ps2_xec_write(struct device *dev, u8_t value)
 
 	/* Read to clear data ready bit in the status register*/
 	dummy = base->TRX_BUFF;
-
+	k_sleep(K_MSEC(1));
 	base->STATUS = MCHP_PS2_STATUS_RW1C_MASK;
+
 	/* Switch the interface to TX mode and enable state machine */
 	base->CTRL = MCHP_PS2_CTRL_TR_TX | MCHP_PS2_CTRL_EN;
 
@@ -169,7 +170,7 @@ static void ps2_xec_isr(void *arg)
 		    (MCHP_PS2_STATUS_TX_TMOUT | MCHP_PS2_STATUS_TX_ST_TMOUT)) {
 		/* Clear sticky bits and go to read mode */
 		base->STATUS = MCHP_PS2_STATUS_RW1C_MASK;
-		LOG_ERR("TX time out");
+		LOG_ERR("TX time out: %0x", status);
 	}
 
 	/* The control register reverts to RX automatically after