soc: atmel: move init code from SYS_INIT to hooks
Replace SYS_INIT with SoC hooks and adapt SoC init code Signed-off-by: Anas Nashif <anas.nashif@intel.com>
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parent
3af24f88ce
commit
51c771ecb2
6 changed files with 10 additions and 29 deletions
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@ -17,3 +17,4 @@ config SOC_SERIES_SAME70
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select HAS_SWO
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select XIP
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select HAS_POWEROFF
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select SOC_EARLY_INIT_HOOK
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@ -135,23 +135,18 @@ void soc_reset_hook(void)
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clock_init();
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}
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extern void atmel_same70_config(void);
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/**
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* @brief Perform basic hardware initialization at boot.
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*
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* This needs to be run at the very beginning.
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* So the init priority has to be 0 (zero).
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*
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* @return 0
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*/
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static int atmel_same70_init(void)
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void soc_early_init_hook(void)
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{
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/* Check that the CHIP CIDR matches the HAL one */
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if (CHIPID->CHIPID_CIDR != CHIP_CIDR) {
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LOG_WRN("CIDR mismatch: chip = 0x%08x vs HAL = 0x%08x",
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(uint32_t)CHIPID->CHIPID_CIDR, (uint32_t)CHIP_CIDR);
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}
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return 0;
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atmel_same70_config();
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}
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SYS_INIT(atmel_same70_init, PRE_KERNEL_1, 0);
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@ -18,10 +18,8 @@
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*
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* This should be run early during the boot process but after basic hardware
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* initialization is done.
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*
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* @return 0
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*/
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static int atmel_same70_config(void)
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void atmel_same70_config(void)
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{
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if (IS_ENABLED(CONFIG_SOC_ATMEL_SAM_DISABLE_ERASE_PIN)) {
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/* Disable ERASE function on PB12 pin, this is controlled
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@ -59,7 +57,4 @@ static int atmel_same70_config(void)
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MATRIX->CCFG_SYSIO |= CCFG_SYSIO_SYSIO5;
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}
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return 0;
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}
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SYS_INIT(atmel_same70_config, PRE_KERNEL_1, 1);
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@ -17,3 +17,4 @@ config SOC_SERIES_SAMV71
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select HAS_SWO
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select XIP
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select HAS_POWEROFF
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select SOC_EARLY_INIT_HOOK
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@ -132,23 +132,18 @@ void soc_reset_hook(void)
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clock_init();
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}
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extern void atmel_samv71_config(void);
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/**
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* @brief Perform basic hardware initialization at boot.
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*
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* This needs to be run at the very beginning.
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* So the init priority has to be 0 (zero).
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*
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* @return 0
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*/
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static int atmel_samv71_init(void)
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void soc_early_init_hook(void)
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{
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/* Check that the CHIP CIDR matches the HAL one */
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if (CHIPID->CHIPID_CIDR != CHIP_CIDR) {
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LOG_WRN("CIDR mismatch: chip = 0x%08x vs HAL = 0x%08x",
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(uint32_t)CHIPID->CHIPID_CIDR, (uint32_t)CHIP_CIDR);
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}
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return 0;
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atmel_samv71_config();
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}
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SYS_INIT(atmel_samv71_init, PRE_KERNEL_1, 0);
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@ -18,10 +18,8 @@
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*
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* This should be run early during the boot process but after basic hardware
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* initialization is done.
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*
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* @return 0
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*/
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static int atmel_samv71_config(void)
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void atmel_samv71_config(void)
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{
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if (IS_ENABLED(CONFIG_SOC_ATMEL_SAM_DISABLE_ERASE_PIN)) {
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/* Disable ERASE function on PB12 pin, this is controlled
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@ -59,8 +57,4 @@ static int atmel_samv71_config(void)
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/* Disable TDO/TRACESWO function on PB5 pin */
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MATRIX->CCFG_SYSIO |= CCFG_SYSIO_SYSIO5;
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}
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return 0;
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}
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SYS_INIT(atmel_samv71_config, PRE_KERNEL_1, 1);
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