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boards: frdm_k64f: Enable pinctrl

Browse source 
Add board level pin group definitions, and remove uart pinmux
driver calls.

pinctrl is enabled for uart driver

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit is contained in:
Daniel DeGrasse 2022-02-21 13:14:24 -06:00 • committed by David Leach
commit 5133709332
4 changed files with 143 additions and 45 deletions
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130
boards/arm/frdm_k64f/frdm_k64f-pinctrl.dtsi Normal file
View file

@ -0,0 +1,130 @@
/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MK64FN1M0VLL12/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#include <nxp/kinetis/MK64FN1M0VLL12-pinctrl.h>
&pinctrl {
enet_default: enet_default {
group0 {
pinmux = <RMII0_RXER_PTA5>;
drive-strength = "high";
slew-rate = "fast";
};
group1 {
pinmux = <RMII0_MDIO_PTB0>;
drive-strength = "low";
drive-open-drain;
bias-pull-up;
slew-rate = "fast";
};
group2 {
pinmux = <RMII0_RXD1_PTA12>,
<RMII0_RXD0_PTA13>,
<RMII0_CRS_DV_PTA14>,
<RMII0_TXEN_PTA15>,
<RMII0_TXD0_PTA16>,
<RMII0_TXD1_PTA17>,
<RMII0_MDC_PTB1>;
drive-strength = "low";
slew-rate = "fast";
};
};
flexcan0_default: flexcan0_default {
group0 {
pinmux = <CAN0_RX_PTB19>;
drive-strength = "low";
bias-pull-up;
slew-rate = "fast";
};
group1 {
pinmux = <CAN0_TX_PTB18>;
drive-strength = "low";
slew-rate = "fast";
};
};
ftm0_default: ftm0_default {
group0 {
pinmux = <FTM0_CH0_PTC1>;
drive-strength = "low";
slew-rate = "fast";
};
};
ftm3_default: ftm3_default {
group0 {
pinmux = <FTM3_CH4_PTC8>,
<FTM3_CH5_PTC9>;
drive-strength = "low";
slew-rate = "fast";
};
};
i2c0_default: i2c0_default {
group0 {
pinmux = <I2C0_SCL_PTE24>,
<I2C0_SDA_PTE25>;
drive-strength = "low";
drive-open-drain;
slew-rate = "fast";
};
};
ptp_default: ptp_default {
group0 {
pinmux = <ENET0_1588_TMR0_PTC16>,
<ENET0_1588_TMR1_PTC17>,
<ENET0_1588_TMR2_PTC18>;
drive-strength = "low";
slew-rate = "fast";
};
};
spi0_default: spi0_default {
group0 {
pinmux = <SPI0_PCS0_PTD0>,
<SPI0_SCK_PTD1>,
<SPI0_SOUT_PTD2>,
<SPI0_SIN_PTD3>;
drive-strength = "low";
slew-rate = "fast";
};
};
uart0_default: uart0_default {
group0 {
pinmux = <UART0_RX_PTB16>,
<UART0_TX_PTB17>;
drive-strength = "low";
slew-rate = "fast";
};
};
uart2_default: uart2_default {
group0 {
pinmux = <UART2_CTS_b_PTD1>,
<UART2_RTS_b_PTD0>,
<UART2_RX_PTD2>,
<UART2_TX_PTD3>;
drive-strength = "low";
slew-rate = "fast";
};
};
uart3_default: uart3_default {
group0 {
pinmux = <UART3_RX_PTC16>,
<UART3_TX_PTC17>;
drive-strength = "low";
slew-rate = "fast";
};
};
};

37
boards/arm/frdm_k64f/frdm_k64f.dts
View file

@ -2,7 +2,8 @@
/dts-v1/;
#include <nxp/MK64FN1M0VLL12.dtsi>
#include <nxp/nxp_k6x.dtsi>
#include "frdm_k64f-pinctrl.dtsi"
/ {
model = "NXP Freedom MK64F board";
@ -95,7 +96,7 @@
arduino_serial: &uart3 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&UART3_RX_PTC16 &UART3_TX_PTC17>;
pinctrl-0 = <&uart3_default>;
pinctrl-names = "default";
};
@ -122,7 +123,7 @@ arduino_serial: &uart3 {
arduino_i2c: &i2c0 {
status = "okay";
pinctrl-0 = <&I2C0_SCL_PTE24 &I2C0_SDA_PTE25>;
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
fxos8700@1d {
@ -136,7 +137,7 @@ arduino_i2c: &i2c0 {
arduino_spi: &spi0 {
status = "okay";
pinctrl-0 = <&SPI0_PCS0_PTD0 &SPI0_SCK_PTD1 &SPI0_SOUT_PTD2 &SPI0_SIN_PTD3>;
pinctrl-0 = <&spi0_default>;
pinctrl-names = "default";
};
@ -144,7 +145,7 @@ arduino_spi: &spi0 {
status = "okay";
compatible = "nxp,kinetis-ftm-pwm";
#pwm-cells = <3>;
pinctrl-0 = <&FTM0_CH0_PTC1>;
pinctrl-0 = <&ftm0_default>;
pinctrl-names = "default";
};
@ -152,19 +153,19 @@ arduino_spi: &spi0 {
status = "okay";
compatible = "nxp,kinetis-ftm-pwm";
#pwm-cells = <3>;
pinctrl-0 = <&FTM3_CH4_PTC8 &FTM3_CH5_PTC9>;
pinctrl-0 = <&ftm3_default>;
pinctrl-names = "default";
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&UART0_RX_PTB16 &UART0_TX_PTB17>;
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
};
&uart2 {
pinctrl-0 = <&UART2_RTS_b_PTD0 &UART2_CTS_b_PTD1 &UART2_RX_PTD2 &UART2_TX_PTD3>;
pinctrl-0 = <&uart2_default>;
pinctrl-names = "default";
};
@ -234,37 +235,23 @@ zephyr_udc0: &usbotg {
&enet {
status = "okay";
pinctrl-0 = <&RMII0_RXER_PTA5 &RMII0_RXD1_PTA12
&RMII0_RXD0_PTA13 &RMII0_CRS_DV_PTA14
&RMII0_TXEN_PTA15 &RMII0_TXD0_PTA16
&RMII0_TXD1_PTA17 &RMII0_MDIO_PTB0
&RMII0_MDC_PTB1>;
pinctrl-0 = <&enet_default>;
pinctrl-names = "default";
ptp {
/* Be aware that PTC16 and PTC17 are also used for uart3 */
status = "disabled";
pinctrl-0 = <&ENET0_1588_TMR0_PTC16 &ENET0_1588_TMR1_PTC17
&ENET0_1588_TMR2_PTC18>;
pinctrl-0 = <&ptp_default>;
pinctrl-names = "default";
};
};
&RMII0_MDIO_PTB0 {
bias-pull-up;
drive-open-drain;
};
&flexcan0 {
status = "okay";
pinctrl-0 = <&CAN0_TX_PTB18 &CAN0_RX_PTB19>;
pinctrl-0 = <&flexcan0_default>;
pinctrl-names = "default";
bus-speed = <125000>;
};
&CAN0_RX_PTB19 {
bias-pull-up;
};
&edma0 {
status = "okay";
};

1
boards/arm/frdm_k64f/frdm_k64f_defconfig
View file

@ -7,6 +7,7 @@ CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_GPIO=y
CONFIG_PINCTRL=y
CONFIG_PINMUX=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=120000000
CONFIG_OSC_EXTERNAL=y

20
boards/arm/frdm_k64f/pinmux.c
View file

@ -38,26 +38,6 @@ static int frdm_k64f_pinmux_init(const struct device *dev)
__ASSERT_NO_MSG(device_is_ready(porte));
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart0), okay) && CONFIG_SERIAL
/* UART0 RX, TX */
pinmux_pin_set(portb, 16, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(portb, 17, PORT_PCR_MUX(kPORT_MuxAlt3));
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart2), okay) && CONFIG_SERIAL
/* UART2 RX, TX */
pinmux_pin_set(portd, 0, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(portd, 1, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(portd, 2, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(portd, 3, PORT_PCR_MUX(kPORT_MuxAlt3));
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart3), okay) && CONFIG_SERIAL
/* UART3 RX, TX */
pinmux_pin_set(portc, 16, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(portc, 17, PORT_PCR_MUX(kPORT_MuxAlt3));
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi0), okay) && CONFIG_SPI
/* SPI0 CS0, SCK, SOUT, SIN */
pinmux_pin_set(portd, 0, PORT_PCR_MUX(kPORT_MuxAlt2));