diff --git a/soc/arm/nordic_nrf/nrf91/Kconfig.series b/soc/arm/nordic_nrf/nrf91/Kconfig.series index 2b0299edada..525b952a20a 100644 --- a/soc/arm/nordic_nrf/nrf91/Kconfig.series +++ b/soc/arm/nordic_nrf/nrf91/Kconfig.series @@ -15,7 +15,7 @@ config SOC_SERIES_NRF91X select SOC_FAMILY_NRF select NRF_RTC_TIMER select CLOCK_CONTROL - select CLOCK_CONTROL_NRF5 + select CLOCK_CONTROL_NRF select SYS_POWER_DEEP_SLEEP_SUPPORTED select SYS_POWER_STATE_DEEP_SLEEP_SUPPORTED select XIP diff --git a/soc/arm/nordic_nrf/nrf91/dts_fixup.h b/soc/arm/nordic_nrf/nrf91/dts_fixup.h new file mode 100644 index 00000000000..575f3e77c3b --- /dev/null +++ b/soc/arm/nordic_nrf/nrf91/dts_fixup.h @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2018 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* SoC level DTS fixup file */ + +#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V8M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS + +#define DT_ADC_0_NAME DT_NORDIC_NRF_SAADC_ADC_0_LABEL + +#define DT_UART_0_NAME DT_NORDIC_NRF_UARTE_UART_0_LABEL +#define DT_UART_1_NAME DT_NORDIC_NRF_UARTE_UART_1_LABEL +#define DT_UART_2_NAME DT_NORDIC_NRF_UARTE_UART_2_LABEL +#define DT_UART_3_NAME DT_NORDIC_NRF_UARTE_UART_3_LABEL + +#define DT_FLASH_DEV_NAME \ + DT_NORDIC_NRF91_FLASH_CONTROLLER_FLASH_CONTROLLER_LABEL + +#define DT_GPIO_P0_DEV_NAME DT_NORDIC_NRF_GPIO_GPIO_0_LABEL + +#define DT_I2C_0_NAME DT_NORDIC_NRF_I2C_I2C_0_LABEL +#define DT_I2C_1_NAME DT_NORDIC_NRF_I2C_I2C_1_LABEL +#define DT_I2C_2_NAME DT_NORDIC_NRF_I2C_I2C_2_LABEL +#define DT_I2C_3_NAME DT_NORDIC_NRF_I2C_I2C_3_LABEL + +#define DT_SPI_0_NAME DT_NORDIC_NRF_SPI_SPI_0_LABEL +#define DT_SPI_1_NAME DT_NORDIC_NRF_SPI_SPI_1_LABEL +#define DT_SPI_2_NAME DT_NORDIC_NRF_SPI_SPI_2_LABEL +#define DT_SPI_3_NAME DT_NORDIC_NRF_SPI_SPI_3_LABEL + +#define DT_WDT_0_NAME DT_NORDIC_NRF_WATCHDOG_WDT_0_LABEL + +#define DT_TIMER_0_NAME DT_NORDIC_NRF_TIMER_TIMER_0_LABEL +#define DT_TIMER_1_NAME DT_NORDIC_NRF_TIMER_TIMER_1_LABEL +#define DT_TIMER_2_NAME DT_NORDIC_NRF_TIMER_TIMER_2_LABEL + +/* End of SoC Level DTS fixup file */ diff --git a/soc/arm/nordic_nrf/nrf91/mpu_regions.c b/soc/arm/nordic_nrf/nrf91/mpu_regions.c new file mode 100644 index 00000000000..32c101f6c13 --- /dev/null +++ b/soc/arm/nordic_nrf/nrf91/mpu_regions.c @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2017 Linaro Limited. + * Copyright (c) 2018 Nordic Semiconductor ASA. + * + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + + +static const struct arm_mpu_region mpu_regions[] = { + /* Region 0 */ + MPU_REGION_ENTRY("FLASH_0", + CONFIG_FLASH_BASE_ADDRESS, + REGION_FLASH_ATTR(CONFIG_FLASH_BASE_ADDRESS, \ + CONFIG_FLASH_SIZE * 1024)), + /* Region 1 */ + MPU_REGION_ENTRY("SRAM_0", + CONFIG_SRAM_BASE_ADDRESS, + REGION_RAM_ATTR(CONFIG_SRAM_BASE_ADDRESS, \ + CONFIG_SRAM_SIZE * 1024)), +}; + +const struct arm_mpu_config mpu_config = { + .num_regions = ARRAY_SIZE(mpu_regions), + .mpu_regions = mpu_regions, +}; diff --git a/soc/arm/nordic_nrf/nrf91/soc.c b/soc/arm/nordic_nrf/nrf91/soc.c new file mode 100644 index 00000000000..f931f0d83ba --- /dev/null +++ b/soc/arm/nordic_nrf/nrf91/soc.c @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2018 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * @file + * @brief System/hardware module for Nordic Semiconductor nRF91 family processor + * + * This module provides routines to initialize and support board-level hardware + * for the Nordic Semiconductor nRF91 family processor. + */ + +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_RUNTIME_NMI +extern void _NmiInit(void); +#define NMI_INIT() _NmiInit() +#else +#define NMI_INIT() +#endif + +#if defined(CONFIG_SOC_NRF9160) +#include +#else +#error "Unknown SoC." +#endif + +#define LOG_LEVEL CONFIG_SOC_LOG_LEVEL +LOG_MODULE_REGISTER(soc); + +static int nordicsemi_nrf91_init(struct device *arg) +{ + u32_t key; + + ARG_UNUSED(arg); + + key = irq_lock(); + + SystemInit(); + +#ifdef CONFIG_NRF_ENABLE_ICACHE + /* Enable the instruction cache */ + NRF_NVMC->ICACHECNF = NVMC_ICACHECNF_CACHEEN_Msk; +#endif + + _ClearFaults(); + + /* Install default handler that simply resets the CPU + * if configured in the kernel, NOP otherwise + */ + NMI_INIT(); + + irq_unlock(key); + + return 0; +} + +void z_arch_busy_wait(u32_t time_us) +{ + nrfx_coredep_delay_us(time_us); +} + + +SYS_INIT(nordicsemi_nrf91_init, PRE_KERNEL_1, 0); diff --git a/soc/arm/nordic_nrf/nrf91/soc.h b/soc/arm/nordic_nrf/nrf91/soc.h new file mode 100644 index 00000000000..ef8c3fd383a --- /dev/null +++ b/soc/arm/nordic_nrf/nrf91/soc.h @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2018 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * @file SoC configuration macros for the Nordic Semiconductor nRF91 family processors. + */ + +#ifndef _NORDICSEMI_NRF91_SOC_H_ +#define _NORDICSEMI_NRF91_SOC_H_ + +#ifndef _ASMLANGUAGE + +#include + +/* Add include for DTS generated information */ +#include + +#endif /* !_ASMLANGUAGE */ + +#define FLASH_PAGE_ERASE_MAX_TIME_US 89700UL +#define FLASH_PAGE_MAX_CNT 256UL + +#endif /* _NORDICSEMI_NRF91_SOC_H_ */